ADA4254 clock rate for 40kHz ADC sampling (or multiples thereof) - 120/125*1MHz?

Background:

I have evaluated the ADA4254 and I really like it's flexibility. So much so, I'm considering using multiple ADA4254s in the AFE of a system using an AD7606B clocked at 640kHz and using it's oversampling function to yield 40 or 80ksps.

Yes, I know I will have to use a difference op amp (which one?) as the AD7606B and can't connect it directly but that's a different question asked on the Precision ADC zone (I may still use an AD7609 but will have to compromise on raw sample rate).

To the question:

I have the opportunity to drive the chopper clock on the ADA4254 to avoid it beating with the 40kHz sampling. Is this approach reasonable? What frequency should I clock the ADA4254 at? (120/125)*1MHz?

Thanks,

Steve

  • 0
    •  Analog Employees 
    on May 20, 2020 11:56 PM 6 months ago

    Hi Steve,

    Thank you for choosing ADA4254 in your application.

    Just a clarification with regards to your question, are you planning on synchronizing your ADC with the ADA4254 in order to avoid the switching artifacts due to the internal chopping?

    As stated on page 36 of the datasheet (ADC clock synchronization), if you want to use an external clock (through GPIO4) on the ADA4254 it has to be at least 1MHz and if it's higher you have to set the clock divider through the SYNC_CFG register in order to bring it to 1MHz and set SYNC_POL to synchronize with the rising or falling edge of the external clock provided. You also mentioned that your AD7606B is clocked only at 640kHz, the datasheet only specified the performance on external clock frequency from 0.8MHz to 1.2MHz.

    Can you confirm if this is what you're trying to do with the ADA4254? Also what does (120/125)*1MHz means?
    Apologies for the delayed response.

    Thanks and Best Regards,
    Dann

  • Hi Dann,

    The internal chopper normally runs at 125kHz and I am sampling at 40kHz from a different clock domain. I feel that I want to synchronise those two clocks to avoid them beating and introducing periodic artefacts.

    I was thinking that 3 X 40kHz is 120kHz so if I clocked the ADA4254 at 1MHz * (120kHz / 125kHz) = 960kHz (within the 0.8 to 1.2MHz allowed) I would eliminate the beat frequency. I suppose I could have written that more succinctly as 120kHz X 8.

    I hope that makes sense.

    FYI, I just hooked-up my ADA4254 EVM to an AD7134 EVM that arrived today. Interesting.

    My wish is for a PGA with the gain flexibility and protection of an ADA4254 with the bandwidth and noise performance to match the AD7134 (or better still, to have an multi-channel, synchronously sampling ADC with a 5mV to 10V PGA built in). 

    Thanks for listening.

    Steve