AD8237 Datasheet ECG "Integrator" Circuit

I have some questions about the "integrator" used in the ECG example in the datasheet (image appended below).

A) What is the reason for using this integrator-like circuit (with feedback through the in-amp) rather than using a passive RC low-pass filter after an inverting op-amp? (The Ref pin has a very high input impedance.)

B) Will the noise of the op-amp not be fed directly into the Ref pin, which is added to the tiny input signal (1-10 mV after the DC offset is removed) before being amplified? Total system noise must be very low for ECG (less than 30 uVpp total) so this is a concern.

C) If I instead use a passive low-pass RC after an inverting op-amp, in place of the integrator, this will low-pass the noise from the op-amp, at only 0.05 Hz for diagnostic ECG. Is this not a much better approach, or am I missing something?

C2) Could I then use an a more noisy (and cheaper) op-amp than the AD8607?

D) With the example circuit, how do I calculate how much noise the resistor and the op-amp are adding to the signal? Is its noise from the op-amp filtered at all by the resistor and capacitor before being fed into the Ref pin?

E) I believe there is a mistake in the example circuit. Taking into account the 100x gain of the AD8237, I calculate the integrator fc cut-off frequency as being 2.4 Hz. This is crazy high for diagnostic ECG (which requires a maximum of 0.05 Hz). I wonder if the engineer intended 0.024 Hz but forgot to account for the 100x gain.

F) For a 0.05 Hz cut-off, the resistor would have to be 100 MOhms (with 3.3 uF) to compensate for the 100x gain. There is a lot of thermal noise in a 100 MOhm resistor. How much of the noise will end up in the system with the example circuit?

F) Also, when there is a DC offset in the signal (such as +-300 mV for ECG), the amplifier will attempt to amplify it 100x (to +-30 V) and saturate the output (at +- 1.65 V in my circuit powered by 3.3 V). This saturated limit will greatly affect the settling time of the integrator until it eventually gets itself within range. Initially the capacitor will only charge at 5% of the desired rate.

G) Given these issues, is the integrator circuit example actually better than the "standard" approach of tying the Ref pin to mid-supply and using a gain of only 5-10x in the in-amp followed by a passive RC high-pass filter and then amplifying it further? The extra stage of amplification requires an op-amp, but there is no op-amp required for any integrator, and the selected op-amp can be much noisier (i.e., cheaper) because the signal has already been amplified 5-10x, and the op-amp can also be used to actively low-pass the signal before the ADC.

Thanks!