AD8220 Noise calculations

Hi Alam,

Matt is currently on vacation and I'm sure he'll have more to say about this subject when he gets back if you need it, but in the mean-time maybe I can be of some assistance.

The output voltage noise, Eno, is 90nV/rtHz on the datasheet. However, if you were to use a gain for your In Amp, that output voltage noise would be divided by that gain. (E.g. If you could design in a gain of 10, Eno would be 9nv/rtHz. For the AD8220, this gives you a calculated RTI noise of ~16.6nv/rtHz.) Matt has actually made a couple very nice videos on this subject, (follow this link to see the noise video: http://www.youtube.com/watch?v=ZaDK-Nqfp-U ) I don't know the specifics of your design, but I imagine you need some gain to work with signals that small anyway. Hopefully something like this will work for your design.

Good luck!
Scott

Dear Scott,

Thanks a lot for your worthy reply and help. I've seen Matt's video about the noise. As it says the noise has 3 contributors: Resistor noise, Input current noise and voltage noise. The output voltage noise is divided by the gain as you mentioned. I'm using 100 Gain. So the output noise should be .9nV/srtHz? Another problem is: i'm using high impedence imput (electrodes). Typically around 2M ohm. But for testing, if i don't use any input resistance, then there should not be any resitor noise contribution. Isn't it? So, we omit it. And what about the current noise? It shoiuld also be zero?

Hence, even if i comeup with some noise factor, say 11nV/srtHz in total; how it means about baseline noise? I just need to know how this setup gives me low baseline noise to pickup very small signal (say 1uV)?

Best regards,

Alam.

Dear Scott,

I just finish testing AD8220B IA one more time. I put 100 ohm for 495 gain. Then short the input terminals (inverting + non-inverting + ref). Then check the output signal with oscillosecope. I found that the baseline voltage noise is about 10mV. So, the actual noise should be around 20uV (10mv/495)? But if i also found that most of this noise is in high frequencies (>101kHz). So, if i put a single order passive low pass filter this noise level goes down to 2mV! (actual noise should be 2mv/495 = 4uV)! Is it correct? My filter R and C are: 1k and 0.1uF. So, the cut-off is around 2 kHz.

Now, i'm not sure if it is the real case or not. If it is then i would like to know where sould i put this lowpass filter? Can i put it in the input terminal as mentioned in datasheet? Because i was planning to put a high pass second-order filter in the output terminal. I don't like to put band-pass there due to some other limitations.

Kindly give your advice.

Regards,

Alam.

Hi Alam,

It sounds like you've been doing a very good job testing your circuit. High frequency noise is often a problem in instrumentation circuits and it is very good practice to filter this out. I would recommend placing this circuit at your inputs anyway because RF interference can often be rectified in the In Amp and seen as a DC offset at the output if you don't filter it out first. Take care to put the capacitor, called Cd in the datasheet, between the + and - inputs of the amp, because otherwise component mismatch in the LPFs can reduce your CMRR. I would also like to call your attention to how this changes the differential corner frequency. Hence, if you took the advice of the datasheet and made your Cd 1uF, then you would want to put a approximately 50 ohm resistor for your LPFs to have about the same corner frequency. Of course, you probably want smaller caps and a larger resistor than this, but that's how the math would work out anyway.

With respect to deriving the baseline noise for the circuit, what you have done makes sense. Once you have calculated this total noise level that you learned from Matt in the video, you still have two basic components of the baseline noise level. The first is 1/f noise, which is the 0.1Hz to 10Hz p-p value listed in the datasheet. That will probably be close to 0.8uV at a gain of 495, but for safety we can estimate 2uV p-p. The rest is the broadband noise. To find this, you multiply your total noise level by the square root of the bandwidth of interest, which is any signal that is not filtered out. So if you have 14nV/rtHz, then you multiply by sqrt(1590hz - 10hz) and you get an rms voltage of about 0.56uV. Now to combine these, we can convert the first number from peak to peak voltage to rms voltage by dividing by 6.6 and then adding the same way we have been: sqrt( (2uV/6.6)^2 + (.56uV)^2) = 0.64uV rms. Which is 4.2uV peak to peak if we convert back. This means that at the output, with a gain of 495, you should expect to see about a 2mV noise level, and a 20uV input spike would be visible above your noise level because it would be gained to 9.9mV.

Sorry to write so much on the subject, but I hope this helps!

Scott

Dear Scott,

Thank you so much for your excelent support. After sevaral testing i've finalized my desing. I'm glad to write that I'm very happy with AD8220B IA for my biological applications. My final desing gives only 4uV baseline noise. So, i can pickup 20uV signal very easily. I used sallen-key filter tropoligy for 5kHz Low-pass signal. It would also help me to work as anti aliazing high frequencies for the Data acqusition card that i'm using.

I'm just little confused about 2 other thinks and need to clear my concept about it. Since i don't expect the bilogical tissue to produce high current, i use very low bias current IA. So, i'm using AD8220B version. Am i right?

Another think is since the input souce impedence is very high (>1Mohm), i'm not sure what value of resistance i should use in the input terminal. Should i still make use of 5pF of terminal capacitance to cancel out RFI noise? Or just no need?

For 2 pole Lowpass sallen key filter amplifier (11 Gain) that should match with AD8220B which Op-amp i should use? I preffer to use: 1 OP-amp/ic since it fascilitate me to desing the tracks. Moreover, by this way i can use SOT23-5 IC!

Thank you again Scott for your kind help.

Regards,

Alam.

Dear Alam,

I'm happy to hear that you've chosen us for your design!

You are correct in choosing the B version. The input bias current for the AD8220B is guaranteed to be less than 10pA, where the AD8220A could be up to 25pA.

I'm not sure if I understand where you plan to put your sallen key LPF, but I would not recommend using this at the input of your circuit. The active components will introduce more noise into your system to be amplified by the instrumentation amplifier. Also sallen key is not high input-impedence and it is a single-ended design and it would be very difficult to match two of these filters for the differential inputs without very high tolerance components.

I would still say it is important to filter out the RFI at the input of the IA because you will have long leads that act like an antenna. For this, however, you will have to consider resistor noise. Recall that 1KOhm is 4nV/rtHz of resistor noise and 4kOhms is 8nV/rtHz. If your resistors are much larger than this, resistor noise will start to contribute a lot to the baseline noise, which makes using the 5pF input impedence to make your filter impractical for this design.. The values in the datasheet would work fairly well, but they would give you a differential cutoff frequency of ~1.9kHz and common-mode cutoff ~40kHz. If you are not comfortable with your phase margins at this range, 1k resistors and a Cc of 1.5nf and Cd of 15nf gives you a differential cutoff at ~5kHz and common-mode cutoff ~105kHz. More combinations can be derived from the filter frequency equations layed out in the data sheet. You can always just include the pads for these capacitors in your design, but leave the capacitors themselves out. That way, you can see if the RF interference is a problem when you get your circuit board and easily add them in later if you need them.

Finally, if you're still looking for an op-amp for an active filter, I know a few parts I could recommend to you, but if you let me know where it is and what you're driving with it, I'll talk to one of my colleagues who specializes in our op-amp products to find you the best product to use in your design.

I hope this information is helpful to you! Let me know anything else that you need.
Scott

Dear Scott,

Thanks again for your excelent support. First of all, i would like to tell that i'm using the sallen key LPF after the IA, of course. Later There is a A to D converter card for PC data acqusition. The reason of using LPF is mainly Anti-aliasing purpose for A-D conversion. Moreover, it gives me low baseline nose!

Regarding the RFI filter in the input terminal i would like to explain my setup. We do electrophysiological recording for Neurons. The neuronal cells are very sensative and we have delicate way to record their electrical activities. We use 20um tungstan electrode for recording the neuronal spikes of this cells. The electrode is normally ranged between 1 to 5 Mohm !  Now, the problem arrise here: the IA input comes from those electrodes which are minimum 1Mohm. So, How it works in real practice? if 1Mohm with 5pF terminal capacitence it should work as a LPF as well? The cut-off frequency should be: 31Khz? What about the noise? as you mentioned: 1kohm gives 4nV/rtHz, so 1Mohm should give: 4uV/rtHz ? I have no control over it. So, how it improves to use Cc, Cd? I afraid that it is best just to feed the signal directly.

Another think to notice. Since these experiments goes inside metal shilleded chembers there is very less radio frequency (i hardly get any signal for my Cell phone). But there is quite high 50hz interference! so these 50 hz would of course appear to the input terminal. Do you think they would be cancelled out? What happen if the inverting terminal is 1Mohm and non-inverting terminal is 2Mohm (depending on the interface)? This cap pickup common mode signal? How to calculate this?

My current desing uses TI's OPA4209 Op-amp due to it's low noise performance. If anything better of similar like that i would love to move to Analog Devices due to your excelent engineering support. Coz it increases my knowlege. Grateful and thankful to you and your colleagues for the help.

Good day,

Alam.

Dear Alam,

A 1Mohm resistor would give 4nV/rtHz * sqrt(1M/1k), which is about 126nV/rtHz. I don't know much about how these electrodes are designed, but it must be safe to assume that their noise level is less than the signal that they are trying to pick up, or they would not be an effective design to pick up these signals. The input impedance of the AD8220 is 10^4 Gohms, which will help with source imbalance, but your CMRR would still be reduced if the electrodes have different resistances. The datasheet shows CMRR for a 1kohm source imbalance to give you an idea.

I see what you mean about the RFI filter. The issue with trying to use the input impedence to make your filter is the position of your electrodes. All of the RF noise would be picked up in the leads, which are after the source resistance, so it wouldn't be filtered out.Since you are filtering after the IA for bandwidth reduction and your application will be well shielded from RF, you might be right that a direct connection is better. I would still suggest designing zero ohm resistors at the inputs of your IA. This way if the offset generated by RFI is a problem, you can replace the 0 ohm resistors with with resistors for RFI filtering. If you eventually decide to use something like 4kohm resistors, it would you an 8Mhz cutoff, which will at least filter out FM radio, television, cell phones, internet, and satellite communications. The reason for the Cc and Cd was to reduce the value of the resistors while also being able to have a low cut-off. But if you decide to add in resistors later, make sure that they are well-matched.

As far as 50-60Hz noise is concerned, that happens a lot and it's difficult to manage because it's frequently in the bandwidth of interest. Some customers are able to high-pass filter this out while others use notch filters. The first thing to check is that there are bypass capacitors from your supply to ground, because this can help reduce this noise significantly. Use something like 0.1uF ceramic caps from + and - supply voltage. Also, if you are

driving your reference pin with a voltage divider or other high-impedence source without isolating it with a voltage follower, this can ruin your PSR. If there is still too much interference, you may want to consider something like a notch filter.

My op amp contact is not in the office today. In the mean-time, see if you like the look of the AD8597, and we'll see what he suggests. Here is the product page:
http://www.analog.com/en/all-operational-amplifiers-op-amps/operational-amplifiers-op-amps/ad8597/products/product.html

Thanks again for choosing us! I'm glad to see the support is appreciated.

Best of luck!
Scott

Dear Scott,

Thank you again for your excellent excellent support. I'm truely grateful to you for your kind help.

Yes, it is difficult to match the recording electrodes. They usually vary in impedance from 1 to 2 Mohm. Hence, normally we pickup baseline noice about 8 to 10 uV. We are happy if we could do so! If the signal is above 50uV we consider them excelent recording! Morever, there is no much control for impedance matching. Hence, it mostly depends on luck. But we should make sure that the system works very well in certain range of impedance missmatch. Your equation for impedance missbalance would simply work very well. 4nV/rtHz * sqrt(1M/1k), which is about 126nV/rtHz. But how to calculate the baseline noise from it? Like before as Mat showen in his video?

Regarding the input RFI filter, i've included the resistor in my design; but not Cc and Cd capacitors. I think a 50 to 100Kohm resistor with 5pf would give me good cut-off. [not that 100kohm is commonly used in biomedical instruments for safety in the input terminal of devices]. It would also give me the cut-off in Khz range.

I'm using 0.1uF source capacitors (non-polar) along with 10uF bipolar capacitors. I need to know if i use 4 IA ics and drive them from the same Battery, which value capacitors i sould use and how many? Where should be their prefered location in the PCB?

Thank you Scott for giving your valuable time to write.

Regards,

Alam.

Hi Alam,

Impedance mismatch will have little effect on noise, but it will affect your CMRR. I would call your attention to page 12 of the datasheet where it shows CMRR in figure 19 and CMRR with a source imbalance in figure 20. Normally, the gain=1 line doesn't change much at all with source imbalance and larger gains are reduced toward the gain=1 line with larger source imbalance. I can't be exactly sure, but I would still expect you to see between 80 and 90 CMRR at 1kHz with your magnitude of source imbalance. But this also seems like it's not your main concern with this design.

For noise calculation, it is just like Matt said in his video. So here is how the noise calculation will work. If you use 100kohm resistors at each input and one electrode is 1Mohm and the other is 2Mohms, your calculation will look like: sqrt((4nv/rtHz * sqrt(1.1Mohm/1kohm))^2 + (4nv/rtHz * sqrt(2.1Mohm/1kohm))^2) which is about 226nV/rtHz total which we don't have much control over (if we use 50kOhm it drops to 223nV/rtHz). Considering our previous calculations, I would expect this noise to dominate in the circuit. Current noise is 1fA/rtHz * resistance, which is 1 or 2nV/rtHz for each terminal, and we calculated the voltage noise of the IA to be close to 14nV/rtHz. At the risk of avoiding the issue, I would say that we will only know the real noise level when you test the electrodes, but we can be sure that the rest of your circuit will be low noise so we will see what is picked up by the electrodes very clearly (unfortunately including the noise.)

As far as placing the source capacitors are concerned, the 0.1 uF caps are generally for high frequencies and therefore they should be placed as close as possible to each supply pin. There is a parasitic inductance that is proportional to the area of the current path and it will reduce the effectiveness of this capacitor at high frequency if your leads are long. Parasitic inductances are also reduced by the use of a ground plane layer. The 10uF capacitor can be used farther from the device. These larger capacitors are intended to be effective at low frequencies, so the path distance is less critical. Generally, this capacitor can be shared by other integrated circuits. Finally, you can mount these all through-hole on the underside of your board. Not extremely critical, but it saves space with the large sized capacitors and it reduces leakage.

It is my pleasure working with you. Let me know if there is anything else I can do to assist you.

Regards,
Scott