I had a question when verifying offset by common mode voltage with LTspice.
In the following circuit, the input common mode voltage was swept from 0V to 70V, and the output voltage fluctuation was confirmed.
The result shows that the output voltage shifts in proportion to the input common mode voltage.
I think this is due to CMRR, and I did it to confirm it.
However, the CMRR of the data sheet is a minimum of 90dB as shown below.
For example, for Vcm = 10V highlighted in the table above, the output voltage was approximately 1mV.
I think the effect on the true output voltage is Vcm / 90dB = 10V / 31622 = 320uV.
In other words, the result of LTspice is 3 times larger than expected.
Could you explain why?
I have one more question.
When the input common mode voltage is 2.5V, the output voltage deviates slightly from 2.5V.
I thought it would be 2.5V ideally, but why is it off?
Is an offset added to the spice model?