Post Go back to editing

Power-on behavior of ADCMP553

I'm investigating the ADCMP553 for a sampling application, where I would want to power up the comparator for as short of a time as possible (ideally, under 100 ns), obtain the result, and power it down for zero quiescent current.

How long would I need to wait from the instant VCC reaches 3.3V until the output is guaranteed to reflect the inputs? For the purpose of this question, you can assume the voltage source is ideal and ramps up from 0V to 3.3V instantly, and you can also assume the inputs always remain within the comparator's specifications. The ADCMP553 part is the one I'm currently investigating, but if one of the higher-performing parts (like the ADCMP573) has better power-up performance, I could use that.

Thanks,

Eddie

Parents
  • Thanks!

    The ADCMP605 (1.25 ns PD) and ADCMP607 (1.6 ns) both have shutdown pins (unlike the ADCMP553) and the wake-up time is only a few nanoseconds more than the latch-to-output time, so I suspect you're correct about the relation between power-on time and latch delays. Although, I do realize that power-gating VCC != toggling a part's shutdown pin. If I test this eventually, I'll post back here with my findings.

Reply
  • Thanks!

    The ADCMP605 (1.25 ns PD) and ADCMP607 (1.6 ns) both have shutdown pins (unlike the ADCMP553) and the wake-up time is only a few nanoseconds more than the latch-to-output time, so I suspect you're correct about the relation between power-on time and latch delays. Although, I do realize that power-gating VCC != toggling a part's shutdown pin. If I test this eventually, I'll post back here with my findings.

Children
No Data