On the Wafer layout of AD630SD/883B products

Dear Support

Why is the layout of the PN:AD630SD/883B DC:2019+ wafer different from that of the datastheet when we order it?

This is the layout on the datasheet in the specification.

This is AD630SD/883 DC:2019+ by de-encapsulating the components, and the wafer layout can be seen visually as shown in the figure:
(for example, a microscope with a magnification of 200X) de-encapsulate the assembly

As shown in the picture, the red mark is different from datasheet.


I would like to ask, why is the layout of the wafer different from that of the datasheet?


Does ADI have any information on this?


Can you provide me with the latest wafer layout?


Thank you very much.

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  • 0
    •  Analog Employees 
    on Jun 4, 2020 2:08 AM 7 months ago

    Hi lerry,

    I'm not seeing any difference.  The pad connections are in the same place. What specific differences are you seeing?

    Cheers,

    George

  • Dear ,George

    I'm glad to hear from you.

    Please take a look at these three pictures for me:

    This is the layout on the datasheet in the specification.

    This is AD630SD/883 DC:2016+ by de-encapsulating the components, and the wafer layout can be seen visually as shown in the figure: 

    This is AD630SD/883 DC:2019+ by de-encapsulating the components, and the wafer layout can be seen visually as shown in the figure: 

    The DC:2016+  wafer layout is the same as Datasheet, but the DC:2019 wafer layout is a little different from Datasheet, which I marked in red.

    I would like to ask:
    why is the layout of DC:2019+ wafers different from that of datasheet?

    Does the ADI factory have any documentation on changing the wafer layout?

    I look forward to hearing from you!

    Lerry

  • +1
    •  Analog Employees 
    on Jun 4, 2020 3:24 PM 7 months ago in reply to lerry

    Hi Lerry,

    I'll look into whether there were any die changes.  In the meantime, are you seeing any performance differences?  Do you purchase bare die or packaged die?  Thanks.

    Cheers,

    George

  • Dear George

    When the IC is fully loaded, we see some functional abnormalities.

    We buy is tape packaged die.


    We unsealed 2 DC2019 and 1 DC2016. It is found that there are some differences between different DC chips. We checked the chip pictures with the datasheet and found that our product is 2016 + compatible with the datasheet, 2019 + has differences, can be shown in our report pictures.

    Thank you for your reply.

    Lerry

Reply
  • Dear George

    When the IC is fully loaded, we see some functional abnormalities.

    We buy is tape packaged die.


    We unsealed 2 DC2019 and 1 DC2016. It is found that there are some differences between different DC chips. We checked the chip pictures with the datasheet and found that our product is 2016 + compatible with the datasheet, 2019 + has differences, can be shown in our report pictures.

    Thank you for your reply.

    Lerry

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