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AD8067 Self-oscillation?

Hello!

I've selected AD8067 as a high speed Op Amp.

Schematic is quite usual and shown below

Power is dual, +/- 3 V.

I have output pulse form like shown below

Blue plot is for input and yellow is for output.

It is the most clear output signal, that I can get by R3 adjustment.

What can be the reason of such distorsion?

Thank you for answer!

  • FormerMember
    0 FormerMember

KotNitro,

All op amps have input capacitance.  You have high values of resistors around a fast op amp.

This is not good.  Make all the resistors ten times smaller.

Also, the only purpose of R1 is input bias current cancellation, but with JFET inputs, you don't

really need R1 other than to limit the current if you have power supply sequencing problems.

Make it 1k.

Also, you need a cap, say 5-10 pF across the pot.

Harry

  • harryh,

    I've change elements according to your recommendations.

    Unfortunately, the result is poor:

    Yellow plot is for pin 4, blue - for pin 1.

  • I'm sorry, but I need to say, that the opamp is probably not the reason.

    I've found that there is a noise on ground wire and opamp power supply lines:

    The yellow plot is for opamp IN- and the blue plot is for the ground wire.

    The output signal cannot be clear in such conditions, of course:

    As we can see, noise form and parameters are the same for ground wire and output signal, so, it looks like noise goes through the opamp and mixes with signal.

    So, I suspect FPGA and resistive DAC for producing this noise, because it appears on the grond wire even when the opamp is disconnected.

    To answer your question about PCB layout - I can't give it now, because I haven't them at this moment, but I can say that it is quite accurate and uses SMD0805 resistors and capacitors and short connections between them and opamp. PCB size for this stage is about 10x10 mm except potentiometer.

    I stiil can't found the way to eliminat this noise, but this story is probably not about the opamp

  • FormerMember
    0 FormerMember

    I would suspect layout then.  Breadboard or pcboard?  Size of bypass caps?

    How close to the package?

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