AD8436 OBUFOUT offset

While waiting on the AD8436 to arrive, I've tried some simulations using the macro model provided.  The sims were done on LTSpice.

I'm using the AD8436 with single supply but noticed that the OBUFOUT has a 104.6mV offset.  This does not happen if I use dual supplies where the offset is around 90uV.  I've tried with several test configurations: OBUFIN- connected to OBUFOUT and OBUFIN+ grounded directly or through a 16K resistor, with OBUFIN- grounded and OBUFIN+ grounded directly or through a 16K resistor.  All configuration gives the same result.

I've gone through the datasheet several times, but no mention is made of this.  Is this a problem with the model, or does OBUFOUT behave like this on the physical device also?

I'm thinking it's a model error since leaving IBUFV+ and/or OBUFV+ disconnected (if not being used) generates a 'floaring node' error.

This is the error log from LTSPICE:

Circuit: * C:\Program Files\LTC\LTspiceIV\Draft1.asc

WARNING: Node NC_02 is floating.

WARNING: Less than two connections to node N009.  This node is used by R:U1:16.

WARNING: Less than two connections to node N004.  This node is used by R:U1:14.

Direct Newton iteration for .op point succeeded.

Singular matrix:  Check node nc_02

   Iteration No. 1

Fatal Error: Singular matrix:  check node nc_02

   Iteration No. 1

This circuit has floating nodes.

Is this model compatible with LTSpice?

Note that I've successfully simulated the AD736 and AD737 using the provided models on LTSpice.

Any help on this is greatly appreciated while I await the AD8436.

  • Hi,

    Thank you for using ADI products. When configured in single supply, where did you connect your IGND pin? Is it connected to ground? If yes, please try connecting it to half of your supply voltage. Also, please connect the input of the output buffer to half of the supply instead of ground. I think that your circuit is railing to the negative supply, which is the ground. The output buffer can only swing a few milivolts to the positive and negative supply.

    Please let me know if there is some change in your results.

    Best regards,


  • Thanks for the reply.

    NeilJ wrote:


    When configured in single supply, where did you connect your IGND pin? Is it connected to ground? If yes, please try connecting it to half of your supply voltage.

    Referring to Fig 1 of the datasheet, why connect it to 1/2 Vcc when it's already biased to 1/2 Vcc via the two 100K resistors?

    Also, please connect the input of the output buffer to half of the supply instead of ground.

    Then according to standard Op-Amp operation, that would put the OBUFOUT to 1/2Vcc.

    According to Table 1 of the datasheet, in the Output Vuffer section, it states that the Output Swing of the output buffer is -Vs + 50uV to +Vs +1V.  With -Vs = 0V (for single supply operation), the lowest voltage at OBUFOUT should be approx 50uV as opposed to the 104mV that I'm getting, which is no where close to the minimum voltage swing.

    Nonetheless, I didi as you suggested and got the results that I expected.  With IGND and OBUFIN+ as 1/2 Vcc, OBUFOUT is at 1/2 Vcc.

    And, again, why IGND?  According to the datasheet, the core and OBUF are independent of each other.

    Also, the section on the EVAL board makes no mention on any of the above for single supply operation, ie: connect IGND and/or OBUFIN+ to 1/2 Vcc.

    This is my simulation cct with the changes you suggested:

    And this the op points:

           --- Operating Point ---

    V(n001):     12     voltage

    V(n003):     -4.8e-015     voltage

    V(n007):     0     voltage

    V(rmsout):     7.88819e-027     voltage

    V(n005):     -1.61879e-023     voltage

    V(n013):     6     voltage

    V(n006):     -0.101589     voltage

    V(n008):     -249.999     voltage

    V(n009):     -0.101589     voltage

    V(out):     6.00007     voltage

    V(n010):     5.99998     voltage

    V(n004):     0     voltage

    V(n002):     6     voltage

    V(rms):     6     voltage

    V(n012):     -249.999     voltage

    V(nc_02):     0     voltage

    V(n011):     6     voltage

    I(C7):     -5.60519e-045     device_current

    I(C5):     0     device_current

    I(C2):     -1.17499e-016     device_current

    I(C4):     6.10159e-017     device_current

    I(C3):     1.2e-018     device_current

    I(C1):     1.2e-016     device_current

    I(R3):     -1.5e-009     device_current

    I(R1):     0     device_current

    I(V4):     -8.88178e-016     device_current

    I(V3):     -1.5e-009     device_current

    I(V2):     -1.17499e-016     device_current

    I(V1):     -0.000585     device_current

    Ix(u1:DNC):     0     subckt_current

    Ix(u1:RMS):     -6.10623e-017     subckt_current

    Ix(u1:IBUFOUT):     -2.49898e-011     subckt_current

    Ix(u1:IBUFINM):     2.49898e-011     subckt_current

    Ix(u1:IBUFINP):     1.175e-016     subckt_current

    Ix(u1:IBUFGN):     0     subckt_current

    Ix(u1:DNC):     0     subckt_current

    Ix(u1:OGND):     -4.93012e-031     subckt_current

    Ix(u1:OUT):     -5.60519e-045     subckt_current

    Ix(u1:VEE):     -0.000585     subckt_current

    Ix(u1:IGND):     1.04606e-015     subckt_current

    Ix(u1:OBUFINP):     1.5e-009     subckt_current

    Ix(u1:OBUFINM):     1.50003e-009     subckt_current

    Ix(u1:OBUFOUT):     -1.50003e-009     subckt_current

    Ix(u1:OBUFVP):     4e-005     subckt_current

    Ix(u1:IBUFVP):     0.00016     subckt_current

    Ix(u1:VCC):     0.000385     subckt_current

    Ix(u1:CCF):     1.2e-018     subckt_current

    Ix(u1:CAVG):     -3.26141e-011     subckt_current

    Ix(u1:SUM):     0     subckt_current

  • Hi,

    I'm sorry for the confusion. I was wrong to say that the IGND pin has to be connected to the half of the VCC when used in single supply operation. You are correct that it is biased to the half supply through the internal 100k resistors. I was actually looking at the Eval board schematic and that you have to disconnect the R6 resistor for single supply. Again, sorry for the confusion.

    Anyway, I tested the AD8436 using its eval board and for 5V single supply operation, the OBUFOUT swings from a few hundred microvolts to around 4.25V. I think that the SPICE model really has to be reevaluated again and revised if necessary.

    Best regards,


  • Sorry for the delayed reply.

    I saw on several posts where it was insisted upon that the models were designed for PSpice or Multi-sim.  I do not use Windows but decided to re-install XP on an old HD to test the model with Multi-sim.

    I got the exact same results, ie: a 104.6mV offset on OBUFOUT.  So you're correct: you MUST re-evaluate the model for this device.  It's a really bad model IMHO.  But looking at other posts where several errors were reported on the datasheet over a year ago, but no update on the datasheet to date, I guess it will be a few years, if ever that the model is corrected.  Analog must take these issues more seriously as there are indeed critical issues for the designer.

    Since I do not have an EVAL board or my devices, I'll take your word that the offset is in the model and does not appear in the EVAL board you tested.  I'll finish my design using the single supply and hope for the best.

    Another question: Is it possible to get >unity gain from the output buffer?  I've tried several configs but no matter what, the gain is always unity.  Is it because of the 16K compensation resistor on the OBUFIN- ?

    What I did eventually did (to test) was to to put a resistor between OGND and ground to increase the output voltage from the core.  This seems to work well.  And yes I know that the internal 16K is precision trimmed to reduce output error from the core.  Bur, let's assume I can live with the additional error produced with the use of the external resistor, would this work?  Or am I missing some design constraints?

  • Hi,

    Thank you for the informative feedback. I have forwarded SPICE issue the personnel responsible for action.

    For the output buffer with gain greater than 1, could you try adding a feedback resistor and a gain resistor from OBUFIN– pin to ground. I have tried gain=+2 with RF=16k, RG=16k and worked both in simulation and on the actual device.