I have searched the internet for hours upon hours to find answers to my questions with no luck... Below are 2 circuits that are a part of a project I am working on.... These are the interface circuits between my system and a balanced signal TDM box with 600 Ohm termination (old school Voice Freq Channel to T1 multiplexer)... The problem is when I run voice grade tests through the system I am getting poor results and I am almost 100% there is impedance mismatch causing the problems. I don't have much experience with telephony interface circuits (or impedance matching between op amps and transformers) and am seeking help....
Figure 1: The input side of the circuit
Figure 2: The output side of the circuit
These circuits were derived from the ADAU1442-EZ board which is the DSP we are using for this application.
On the input side of the circuit a balanced signal comes into the transformer which has a 1:1 ratio. I have the 680 Ohm resistor to ground but I think I need to put a 2.16uF capacitor in series with that 680 Ohm resistor to match the line impedance, right?
On the output side I think I should remove the 22k Ohm resistor along with the 3.3nF and 4.7uF cap (replacing the 4.7uF cap with a 2.16uF), again to match the line impedance, but I am not 100% about this.
Is this problem a lot bigger than what I think? Part of our circuit also has a built in telephone hybrid (dual transformer design) which when activated bypasses the 1:1 isolation transformers (not shown in the above figures but the op amp circuits are the exact same). That is where I am seeing the worst voice grade test results (with the hybrid in the circuit).
I appreciate any feedback provided.
The intermodulation distortion at a 23-tone test signal of -15 dBm is returning a 3rd order of ~+50 dBm which is 1 dBm above the threshold. We want it to be >+60 dBm. The 2nd order is also low (~+55dBm). That is the main test that I am concerned with. The results seem to fluctuate quite a bit (+/- 5 dBm when we usually see +/- 2 or 3 dBm which I think is a "flanging" effect going on due to the bad impedance matching).
The board is a 4 layer board with the inner 2 layers being power and ground. I worked on the circuit design but we had a vendor do the actual PCB layout and production (prototypes). The primary frequencies we are interested in are 304 Hz to 3004 Hz at -13 dBm with the exception of the 23-tone test.
As for the test setup we are running a TIMS test set to a 66 block which connects to the card/cage via 60 pin telco cable. We've never quantified our circuits by THD before, but maybe I should look into it...
On the card itself after passing through the op-amp circuits it goes to a AD1938 codec and to the ADAU1442 for processing.
Could the internal filters of the DSP be causing the bad harmonics in the Intermod distortion test?
Thanks for responding to my post.
The DSP, if running a pass-through program, should be essentially transparent from an analog-to-analog performance perspective.
If you are actively implementing filters during your test, however, then it's possible that they are having a negative impact on the performance, depending on their configuration. Did you try running the test with the DSP program bypassed?
Thanks for posting links; I will spend some time reading through those and looking further into possibly using different op amps.
Thank you for the reply. I created a pass-through program and uploaded it to the DSP; the 2nd order intermod seemed to improve, but the 3rd order intermod was the same if not a little bit worse... I figured out how to do a echo return loss measurement on our TIMS and if I have both ends terminated 2-wire @ 600 Ohms I get ~ -20 dBm ERL but if I unplug the far end it drops to ~ -10 dBm (which I expected it to be worse). I found a document online that had the schematics for a radio to telephone interface circuit that I plan on taking bits and pieces from and adapting into my design to see if it improves at all...
If you are curious as to what I found: http://www.sunairelectronics.com/web/workspace/uploads/rtu-200-1326998987.pdf
Again, thank you for your feedback.
Well I removed C112, R41, and C58 from the 2 circuits above and it doesn't seem to improve the intermod test levels. My next plan is to remove C56 and replace it with a 2.2uF capacitor since I read that telephone line impedance is characterized as 600 Ohm resistance with 2.2uF capacitance. Along those lines I also plan on putting a 2.2uF cap in series with R42...
How were the values for C83 and C56 determined? Are they simply to block any kind of DC from entering the op amp or are they acting in conjunction with the resistors to form a filter (I feel really stupid for asking that because I should know the answer but the digital world has taken over my brain since graduating )... Could the RLC system be resonating and causing of the 3rd order intermod being lower than expected?
Thanks for any input.