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ADCMP582 Comparator: Disable Latch Feature.

In the Rev A data sheet for the ADCMP582, there is a figure that illustrates a method for disabling the latch feature.

Here's the figure:

I plan to use this device with Vcco=+3.3V.

The LE pin is shown connected to Vcco via a 750 Ohm resistor. Since the LE pin is terminated to VTT by 50 Ohms,

I calculate the voltage at the LE pin will be +1.4V.

The complimentary LE input, I'll call it LEBAR is connected to VTT, giving LEBAR=+1.3V.

So we see that LE is HIGH and LEBAR is LOW. This should disable the latch feature. Good.

My question is this: Is Figure 23 incorrect?

I ask this because the minimum Latch Enable Input Differential Voltage given in Table 1 for the ADCMP582 in PECL mode

is 200mV. The circuit of Figure 23 produces a differential of 100mV.

There is no discussion of Figure 23 in the data sheet.

Cheers,

David

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  • Hi David,

    The latch disabling circuit of the ADCMP582 shown in the Figure 23 of ADCMP582's datasheet is correct. The diagram shows how the latch will be disabled when those supplies are used(Vcco=3.3V) and the LE-bar is connected to VTT(Vcco - 2V).

    Below is the latch enable input differential voltage range of the ADCMP582. 200mV is the minimum differential value that the latch is guaranteed to work. Therefore, a differential of 100mV should disable the latch.

    Regards,

    Jay

  • Hi,

    I understand this post has been closed. But I am really confused regarding the latch disable feature of these comparators. We are using  ADCMP573 in our design but I believe both family of comparators have almost same functionality. As you said regarding the latch disable feature if we keep the latch enable differential below the minimum differential value required then latch function would be disabled. 

    So can we conclude that the device will be working in compare mode with this kind of configuration? 

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  • Hi,

    I understand this post has been closed. But I am really confused regarding the latch disable feature of these comparators. We are using  ADCMP573 in our design but I believe both family of comparators have almost same functionality. As you said regarding the latch disable feature if we keep the latch enable differential below the minimum differential value required then latch function would be disabled. 

    So can we conclude that the device will be working in compare mode with this kind of configuration? 

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