# ADCMP572 input biasing

We are having trouble getting the ADCMP572 to receive a 400mVppdiff signal running at 2.7Ghz without disturbing the serial link it is attached to (see attached diagram).

1) What DC bias do inputs want to

operate in middle of CMR?

2) What is Vinmin?

3) What is the structure of the input?

• I have the same question, I am using this as the input stage for a high frequency counter and need to ac couple the inputs. Does the chip provide a mid rail DC bias? If not what is the recommended circuit for applying a DC bias to the inputs for detecting a zero crossing without referencing ground to a negative voltage?

• can you look into this question please?

Thank you

• Hi lallison. I am not an expert on the ADCMP572, but I will ask the appropriate expert to follow up. Thank you.

• Hi ihnenm,

There are two ways you can introduce a DC bias to the inputs.

First, if you have another dedicated voltage source, you can force the DC bias through the VTN/VTP pins as shown on the figure below. For example, if you have the VCCI set to 3.3V, the middle of your input range is at 0.5V (input range is -0.2V to 1.2V for VCCI=3.3V).

Another way is to use a voltage divider with its center connected to the VP/VN pins. The voltage divider should also have an impedance equivalent(R1 in parallel with R2) to 50ohms for impedance matching. So for VCCI=3.3V, the value of R1=R3=383ohms and R2=R4=57.6ohms.

Best regards,

Rainier