Bandwidth of AD8000 in non-inverting configuration

I have a AD8000 SOIC package in noninverting configuration (Fig. 50 datasheet). Rf=439 ohms, Rs=0ohms, RL is open circuit, Rg = open circuit, 0.1 uF decoupling caps at supply pins. I am using +/-5V supply. I am interested in the performance at 1.25 GHz. I use -20 dBm input and get -26 dBm output at 1.25 GHz. I don't think this matches the performance shown in Fig.5 of datasheet. Can you suggest what I could change to make it work as expected?

  • I added 10 uF decoupling caps. at the V+ and V- terminals and also made the feedback close to 431 ohms. Now I get a 3 dB loss at 1.25 GHz (small signal, -10 dB input), but table 5 in datasheet claims a 3 dB bandwidth of 1.58 GHz. The numbers I get match Figure 5. Why does table 5 not match figure 5? What is the difference from?

  • 0
    •  Analog Employees 
    on May 16, 2017 11:31 PM

    Hi Atul,

    Could you run a frequency sweep on your setup? By that we could see the actual response of the amplifier. In Figure 5, at G=+1, the gain is rolling off rapidly after 1 GHz. This means that a very small change in frequency is a drastic decrease on the gain. The best way to see this is on a frequency sweep on your current setup.

    The variation on your result and on the table 5 is due to parasitic capacitance present on your board. This greatly contributes on the decreased bandwidth as compared to the defined value in the said table.


    Regards.

    Jino

  • Hi Jino,

    Thanks for your response.

    The figure 5 of the datasheet does not match Table 5 (Gain = 1 for SOIC). Why is that?

    Could you elaborate on the parasitic capacitance you refer to. I have made sure there is no ground plane underneath the high speed signal traces. I do have a ground plane underneath the chip as in the datasheet (smaller than the datasheet with fewer vias). Let me know if you have layout recommendations. I have tried to follow those in your datasheet.

    Also, if would be great if you have a sample gerber for this AD8000 SOIC chip, noninverting circuit. (Figure 50)

    Thanks and look forward to your response.

    Best regards,

    Atul

  • 0
    •  Analog Employees 
    on Jun 29, 2017 1:28 AM

    Hi Atul,

    Figure 5 does match the data in Table 5. Please note that the graph is in log scale.

    These discussions would help in your layout considerations. AD8000&AD8001 PCB design issues and Same function by using same pcb design for AD8001&AD8000.

    Regards,

    jino

  • 0
    •  Analog Employees 
    on Aug 2, 2018 3:49 PM
    This question has been assumed as answered either offline via email or with a multi-part answer. This question has now been closed out. If you have an inquiry related to this topic please post a new question in the applicable product forum.

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