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Problem with AD8336 model in LTspice

I'm using LTspice to simulate a circuit, and could not get the published AD8336 model to work. I searched Google and EngineerZone, but it still won't work. I do not have a background in spice models, so this is difficult for me to debug. Hopefully it's something simple, I would really like to use this device.

  1. To debug this issue, I'm using AEi Systems' test circuit for the model (Figure 4.5 on p.6 of the PDF attached here: https://ez.analog.com/message/26195?commentID=26195#comment-27724)
  2. The published AD8336 model will make LTspice throw an error about unrecognized functions (nonzero and np). Other threads on Engineer Zone (AD8336 Simulation in PSPICE Issues, AD8336 with ADISimPE) include revised models, which do not have these errors.
  3. With the revised models, the pre-gain amp half works fine, but VOUT from the VGA does not have an output. It's not railed - here's just no signal.

Can someone please help me get to the bottom of this?

Thanks,
Dan

  • Hi,

    1. In Fig. 4.5 of the reference pdf file you attached, there are resistors R7 and R8 in the output but in your schematic output is floating. Try adding these resistors in the output. Also, voltage at VGPOS = -1.0 instead of 0.5V in your schematic.

    2. Your input might be too fast and high. Change it to ex. 500mV amplitude and frequency of 100k then increase also simulation time to around 20us.

    3. Finally, for now please add this statement in your LTspice test schematic ".options cshunt=1e-15".

    Please check the attached file for your reference.

    Hope this helps.

  • Hi,

    Sorry, I missed this reply somehow until today. Thank you for your guidance with this problem.

    1. If I add any output load to VOUT, the simulation fails, because that node does not have an output. Here is the message:
      'Analysis: Time step too small; initial timepoint: trouble with node "u1:u3_n48971" '.
    2. I changed the input and simulation time like you suggested and showed, (500mVpk @ 100kHz), but I still have the failure at VOUT.
    3. Unfortunately, cshunt option does not help.

    Any other ideas what the problem might be?

    Thank you,

    Dan

  • Hi,

    Can you attach your latest test circuit schematic?

    Thanks.

  • Here is a screengrab of my schematic. I'm also attaching a ZIP of my schematic, symbol (auto-generated by LTspice), and model (from ADI forums). I'm using LTspice XVII(x64).

  • It should be ".options cshunt=1e-15" not ".op cshunt=1e-15".

    Please try again running the simulation.

  • Wow, thanks! I tried to import the AD8336 model in to LTSpice some months ago and also couldn't get it to run or find help online. On a lark today I decided to try again and search again for an answer again - and here it is. Now it works thanks to the .options cshunt SPICE directive. Learn something new everyday in this line of work...

  • Sorry for the delay, and thanks for correcting that. Not sure how I ended up with .op instead of .options. The debug circuit works with those options. Unfortunately, when I pair this IC with others I'm simulating, the sim will never finish. It could be this model, or the other models, or user error. Unfortunately I don't have time now to debug it further. Anyway, thanks for helping to get the model working in this reference circuit