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Hi !

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Q1)

Our customer are planing to make evaluation board to change "single-CVBS" to "Diff-CVBS" to input ADV7281A-M.

To connect to ADI video decoder,  I think AC-coupling is necessary.

At ADA4433-1 datasheet page.22 Figure 55, there is "Difference Amplifier in a DC-Coupled Configuration" reference circuit.

Do you have "Difference Amplifier in a AC-Coupled Configuration" reference circuit?

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Q2)

Our customer will use like this.

"CVBS source" => "Single-CVBS" => "ADA4433-1" => "Diff-CVBS" => "ADV7281A-M"

Do our customer have to do AC-Coupling between "CVBS source" and "ADA4433-1"?

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Q3)

Do our customer have to do AC-Coupling between "ADA4433-1 source" and "ADV7281A-M"?

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Q4)

At ADA4433-1 datasheet Page.15, this is written.

Does this mean whether AC-coupled or DC-coupled, we do not change the connection of -IN and we need to bias with half the amplitude of + IN?

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Q5)

At ADA4433-1 datasheet Page.15, this is written.

Our customer are planing to use these value for each components.

C1 = 22uF

R1 = 62kOhm

R2 = 27kOhm (1V bias

*Fc = 0.26Hz.

How should they decide these value for each components?

Do you think that there is no problem with these values?

How should the cutoff frequency of the high-pass filter be taken into consideration while considering the NTSC signal frequency? (Does sag do not occur?)
Since 1Vpp signal is supposed to be input, is it OK to understand that 1.0 V bias is OK?
When deciding each constant, is there a point to consider other than the cutoff frequency and the bias voltage?

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Best ragards

Kawa

Parents
• Hi Kawa,

Apologies for replying late.

Answering your first and third question you can refer on the Figure 22 of ADV7281 datasheet the AC coupling is necessary at the input of the device as a DC block.

AC coupling between the source and ADA4433-1 is essential, this ensures that any other DC bias by the CVBS source is blocked or removed before the amplifier. The offsets in the input amplifier should then be biased say for example in your application you have 1Vpp signal, the offset should be as what you have said in question number 4 half the amplitude of the signal in +IN. You can use the default bias recommended in the datasheet which is R3 = 7.5kΩ and R4 = 1.33kΩ. It should be observed that the dc voltage bias at the inputs are equal so that the offset on the differential output of the amplifier will be on the same level, otherwise it will drift apart. In a scenario where your input signal is 2Vpp, the offsets on each input should be 1V, we can compute for the values of the resistors based on what is suggested on the datasheet.

This will give us R3 = 3.059kΩ.

I think the values of your components are too large compared to the input impedance of the device. I'd recommend you use the prescribed value in the datasheet where its value is near negligible for loading. Compute the combination for the sweet spot between loading effect and the capacitance value to be used. The resistor values of the biasing circuit should be equal for proper matching.

Let me know if you have clarifications.

Regards,
Goz

• Hi Kawa,

Apologies for replying late.

Answering your first and third question you can refer on the Figure 22 of ADV7281 datasheet the AC coupling is necessary at the input of the device as a DC block.

AC coupling between the source and ADA4433-1 is essential, this ensures that any other DC bias by the CVBS source is blocked or removed before the amplifier. The offsets in the input amplifier should then be biased say for example in your application you have 1Vpp signal, the offset should be as what you have said in question number 4 half the amplitude of the signal in +IN. You can use the default bias recommended in the datasheet which is R3 = 7.5kΩ and R4 = 1.33kΩ. It should be observed that the dc voltage bias at the inputs are equal so that the offset on the differential output of the amplifier will be on the same level, otherwise it will drift apart. In a scenario where your input signal is 2Vpp, the offsets on each input should be 1V, we can compute for the values of the resistors based on what is suggested on the datasheet.

This will give us R3 = 3.059kΩ.

I think the values of your components are too large compared to the input impedance of the device. I'd recommend you use the prescribed value in the datasheet where its value is near negligible for loading. Compute the combination for the sweet spot between loading effect and the capacitance value to be used. The resistor values of the biasing circuit should be equal for proper matching.

Let me know if you have clarifications.

Regards,
Goz

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