LT6017 and ADAQ7988

I am testing a circuit that seems to be exhibiting strange behavior vs simulation.

I expect a DC gain of ~1.4x, which the simulation shows.

This is the circuit in question.  The final amplifier is a placeholder for the ADAQ7988's internal ADC driver.  

The problem I am experiencing is that even though the LT6017 and ADAQ driver are powered by dual supplies, the low-end performance of the circuit is not representative of the gains expected.  At 20 mV I am only seeing a gain of 1.1x and not seeing the full gain of 1.4x until about 2V.

  

Perhaps I need to use a different amplifier to better model the ADC driver?

Even though it is dual-railed, this behavior seems to be more like I would expect from a single supply.

Anyone else experience this?

  • Hi bernico,

    I tried to sim the same thing, but my numbers are matching what you should have been expecting.  Screenshot below.  A few things I can think of that might be causing issues - I am assuming you are using the models included with LTSpice.  Also, are you up to date on the version (Sync Release)?

    Failing at that, here is my netlist - give this a shot and see if it gives you any different results.


    V1 P5V 0 5
    V2 N5V 0 -5
    V3 in 0 0 AC 1
    R1 N001 in 30k
    R2 invert N001 30k
    R3 N002 invert 18.2k
    R4 N004 N002 18.2k
    C1 N004 0 10n
    C2 s1out N002 22n
    R5 N003 0 45.3k
    R6 out N003 18.2k
    XU3 0 N001 P5V N5V invert LT6016
    XU1 N004 s1out P5V N5V s1out LT6016
    XU4 s1out N003 P5V N5V out LT6016
    .dc v3 -10m 2.2 -1m
    .lib LTC2.LIB
    .backanno
    .end


  • Tony,

    Thanks for taking the time to look into this.  In simulation, everything is correct.  My problem is actually occurring in the test of this circuit in hardware.  The working theory now is that the gain resistors are limiting the output current too much to provide good feedback.  The datasheet for the ADA! looks like they use resistors well below where I am at.  I am going to see if scaling back by a magnitude gets me any closer.

  • No problem!

    How are you simulating the ADC load?  Do you have additional load resistance on the end?  I know that the part may act funny if it is loaded more heavily, but I first need to get an idea if that is even the case, or maybe there could be a confounding factor in the setup.  How are the supplies bypassed (caps)?