I have 2 AD8221 layouts, one which works well, and one identical schematic, different layout which has oscillations on the output.
I have probed the inputs and they look good. If I remove my two resistors and open switches between RG terminals (for setting 2 other gains besides G=1 when I close a switch), there is no oscillation.
I found in the datasheet for AD8221 this: "Traces from the gain setting resistor to the Rg pins should be kept as short as possible to minimize parasitic inductance."
What kind (cap/ind series/parallel) and level of parasitics on Rg will cause issues? I know it must be parasitics on Rg because I have the other layout with the same circuit that works fine. I know it's Rg because removal of the loop with two sets of switches (open) and inductors fixes the oscillation.
Also is it possible to simulate this issue in the spice model? I have tried many simulations with parasitics that cause at most 80uV of oscillation at the output, but I'm seeing much more.
Supplies at +/- 5V, inputs at 500mV and Gnd with 100pF cap across them, Ref at Gnd. Again, the inputs look great, only the output has oscillation.
>> What kind (cap/ind series/parallel) and level of parasitics on Rg will cause issues?
This depends on many things. What is the oscillation frequency?If you have parasitic capacitance…
This depends on many things. What is the oscillation frequency?If you have parasitic capacitance from either side of Rg to ground (because of ground layer is directly underneath Rg),this increases effectively your gain for very high frequencys. That can lead to instability.To cure this, you can remove the ground layer around Rg + switching circuit + gain leads.
But my gut instinct says, that this is maybe not the problem.You told, that you have switches on the Rgs? Then I think, probably you couple the output voltage inductively or capacitively ontoyour switching cicuit and gain leads. I suggest encircle your gain switching parts with a guard ring, keep the output leads away from that. Keep all the traces in the gain path as short as possible and on the same layer - no excuses.But the most popular wrongdoing when having oscillations is with power supply decoupling. These two(!) capacitors need to be ceramic of 1µF to 10µF and must be as close as possible to the Vcc / Vee pins. Connet the caps with multiple vias directly at the cap pads to a ground plane.Additionaly you can- embed your signal input leads into a flooded ground.- use that emi-filter-capacitors (in data sheet) on your signal input
Post your schematics (both) and the gerbers in color.