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# LT1711 - output rise time versus fall time

Hi,

I am testing the LT1711 and connected the following load circuit to its outputs:

OUT+ and OUT- toggle between 0.15V to 4.7V.

There is no hysteresis in this circuit.

When measuring Tr and Tf:

OUT+ : Tf > Tr by ~1ns (Tr=~2ns; Tf=~3ns)

OUT- : Tr very similar to Tf, and equal ~4ns.

My questions:

1. I expect Tr for OUT+ to equal Tf for OUT- (and Tf for OUT+ to equal Tr for OUT-) since both OUT+ and OUT- go into a differential input stage.
Why is the un-symmetry here?

2. Tr and Tf for OUT- are higher than the ones for OUT+.
both output stages should be symmetrical (the load is symmetrical).
Why is this un-symmetry?

Thank you

Gil

• Hi Gil:  I spoke to the LT1711 apps engineer, Philip Karantzalis, and he suspects that the loading is just too heavy.  We are trying to get him signed up on E-zone.

• Hi Glen,

I am testing now the LT1713 (lower gain than the LT1711).

I see the same issue with its Tr and Tf.

It is sourcing 7mA (instead of 10mA).

/Q: Tr=3.21ns

Q: Tr=2.07ns

What do you think is the reason for this?

thanks

Gil

• Hello Gil.

I would agree with Philip K.  You are at the very edge of comfort on the output current capability.

You can see in the LT1711 tables that 10mA is associated with output voltages already going far from the V+ and V-.  And furthermore, you will see that Voh and Vol are not symmetrical.  I would think that this means the rising and falling will be slightly different when pushing so much current.

Why would OUT+ and OUT- be different?  That I am not sure.  Except that your schematic appears to be different to me.  I have not simulated your schematic, but it would seem that you should only truly expect exactly the same behavior on OUT+ and OUT- when the loading is absolutely identical for both.