SSM6322 0V REF SPICE model issues


I'm hoping to use the SSM6322 in a headphone amplifier design with single ended analogue inputs which are centered around 0V. I do not need offset compensation, and therefore would like to ground the two REF pins on the chip to achieve zero offset. I also need gain control, and I was planning to use the first stage amplifiers to achieve this and save me two extra op-amps.

My issue is with the SPICE model. It goes horribly unstable if you ground the REF pins, which has me worried there is something I'm missing and the real part will do this too. The SPICE model is also unstable when set up exactly as Figure 47 in the datasheet. So I'm fairly confused.

I have attached my circuit configuration from LTspice. The layout looks horrible because I just used the auto-generated symbol from the subcircuit.

Does anyone have any experience of using this chip with an input offset of 0 volts?

I'm prepared for the fact that I may have to use the SD pin to shut down the first stage amps in this chip and just use the output drivers with an external op-amp. I'd just rather save a chip and use the first stage amps if I can! The simulation confirms that the first stage is the source of the instability, the second stage is working great.

Any help anyone could provide would be greatly appreciated!


  • So I kind of answered my own question. Thought I'd update this thread.

    I did some more testing and I am sure the spice model is the issue. I got it to work with the exact circuit in figure 47 of the data sheet, but only for output voltages below 0.6V. As soon as the output goes above this voltage, the part goes unstable. I tried this into resistive loads from 1K down to 16R.

    I also looked at the schematic of the evaluation board, and noticed they're providing the option of grounding the reference pins using jumpers, suggesting the chip is stable when configured this way.

    I'm going to go ahead and make up a prototype and I'll update again if I discover anything unexpected.