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About ada4922 spice model



		

			

									
					    alexis.damiens
					
							

			
				
									
											
			
			
				
    
			
			
			    	
			                    
                
				                on Sep 12, 2018 
				
			
			
		
    

				
		
    
		    		    
		    
		    	
			
    Hi,
    

    

    I downloaded ada4922.cir from this page http://www.analog.com/en/design-center/simulation-models/spice-models.html
    

    however it seems that there is an additionnal "Feedback" pin that does not exist in the datasheet.

    I believe that the subject has already been discussed in this thread but I cannot understand the language....
    

    https://ez.analog.com/cn/amplifiers/f/q-a/96028/ada4922-1-cir
    

    

    I think that FB pin shall be directly connected to out+. Can you confirm that ?
    

    

    In advance thanks.
    

    Kind regards.
    
								
    

				
				
		
    
			
						
									
									
						
						
			
			
			
			
		
    

        
        

					
    
			
    


    


	















    
	
    
	
    
					



			








	
	
	
	



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													+1
							
			
				
									
							        
			
			
			
      •  Analog Employees  
      
            
			                            
                        
                on Sep 13, 2018 2:57 AM
            
            
					
      
	
      

		
		
      
					
      Hi Alexis,
      

      

      Thank you for pointing this out. There must've been some error in uploading the SPICE Model. FB pin shouldn't be part of the NODE assignments of ADA4922 spice model.  It must be internally connected in the model. Anyway, you have two options:
      

      1. Connect FB pin to pin 4. or
      

      2. Use the SPICE model attached.
      


      



      
    
      
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        ADA4922.txt
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      * ADA4922 SPICE Macro-model        
* Description: Amplifier
* Generic Desc: Hi Volt Driver for +10V ADCs to 18 bit
* Developed by:
* Revision History: 08/10/2012 - Updated to new header style
* 					9/13/2018 - Removed FB pinout. Added Rfb. - JL
* Copyright 2012 by Analog Devices, Inc.
*
* Refer to http://www.analog.com/Analog_Root/static/techSupport/designTools/spiceModels/license/spice_general.html for License Statement. Use of this model 
* indicates your acceptance of the terms and provisions in the License Statement.
* 
* BEGIN Notes:
*
* Not Modeled:
*    
* Parameters modeled include: 
* END Notes
*
* Node assignments
**             REF Vcc OUT+ OUT- Vee IN	
**				|	|	|	|	|	|	|
.subckt ADA4922	2b	99	4	4a	50	1  		
			
***Differential Stage							
Q1	13	12	14	npn			
Q2	17	2	16	npn			
Rc1	98	13	Rideal	3.200E+00			
Rc2	98	17	Rideal	3.200E+00			
Re1	14	15	Rideal	3.148E+00			
Re2	15	16	Rideal	3.148E+00			
Ibias	15	51	1.00E+00				
Dcmlim1	18	15	DQUIET				
Vcmlim1	18	51	-0.074				
							
***Voltage Noise Generation							
HVnoise	12	7	Vvnoise	1			
VVnoise	501	0	0				
DVnoise	501	0	Dvnoise				
RVnoise	501	0	0.003755102				
							
***Current Noise Generation on +IN							
FInoise1	12	0	VInoise1	1			
VInoise1	502	0	0				
DInoise1	502	0	DInoise1				
RInoise1	502	0	8448.979592				
							
***Current Noise Generation on -IN							
FInoise2	2	0	VInoise2	1			
VInoise2	503	0	0				
DInoise2	503	0	DInoise2				
RInoise2	503	0	8448.979592				

***Common Mode Injection						
Rcm1	1	601	Rideal	100Meg		
Rcm2	2	601	Rideal	100Meg		
Gcmr	0	602	601	75	1.00E-06	
Rcmr1	602	603	Rideal	1Meg		
Rcmr2	603	604	Rideal	1.778E+00		
Lcmr	604	0	9.434E-05			
Ecmr	10	9	603	0	1.000E+00	

***Positive Power Supply Rejection						
Epsr1	700	0	98	0	1	
Rpsr1	700	701	Rideal	1.00E+02		
Rpsr2	701	702	Rideal	3.162E-04		
Lpsr1	702	0	1.007E-07			
Epsr2	11	10	701	0	1	

***Negative Power Supply Rejection					
Epsr3	703	0	51	0	1
Rpsr3	703	704	Rideal	1.00E+02	
Rpsr4	704	705	Rideal	1.000E-04	
Lpsr2	705	0	3.183E-09		
Epsr4	12	11	704	0	1

***Input Offset and Bias					
Vos	1	7	4.000E-05		
Ios	1	2	5.000E-08		

***Input Impedance					
Cinv	2	0	2.00E-12		
Cninv	1	0	2.00E-12		

***1st Gain and Slew limiting					
Gslew	0	101	17	13	1.0000E+00	
Rslew	101	0	Rideal	2.50E+02		
Dslew1	101	102	DZENER			
Dslew2	0	102	DZENER			

***Second Gain and Dominant Pole with Output Voltage Limiting						
Gp1	51	201	101	0	1.885E-06	
Rp1	201	51	Rideal	2.122E+09		
Cp1	201	51	1.0E-12			
Vlim1	97	206	1		
Dlim1	201	206	dquiet			
Vlim2	207	52	1
Dlim2	207	201	dquiet			
Esupref1	97	98	51	0	1	
Esupref2	52	51	51	0	1	
						
***Second Pole						
Gp2	0	202	201	51	1.00E-03	
Rp2	202	0	Rideal	1.00E+03		
Cp2	202	0	2.27364E-12			
						
***Third Pole						
Gp3	0	203	202	0	1.00E-03	
Rp3	203	0	Rideal	1.00E+03		
Cp3	203	0	1.59155E-16			
***Fourth Pole						
Gp4	0	204	203	0	1.00E-03	
Rp4	204	0	Rideal	1.00E+03		
Cp4	204	0	1.59155E-16			
***Fifth Pole						
Gp5	0	205	204	0	1.00E-03	
Rp5	205	0	Rideal	1.00E+03		
Cp5	205	0	1.592E-16			
						
***First Zero						
Gz1	0	301	205	0	1.00E-03	
Rz1	301	302	Rideal	1.00E+03		
Lz1	302	0	1.592E-10			
***Second Zero						
Gz2	0	303	301	0	1.00E-03	
Rz2	303	304	Rideal	1.00E+03		
Lz2	304	0	1.592E-10			
***Third Zero						
Gz3	0	305	303	0	1.00E-03	
Rz3	305	306	Rideal	1.00E+03		
Lz3	306	0	1.59E-10			
						
***Buffer						
Gbuf	0	401	305	0	1.00E-02				
Rbuf	401	0	Rideal	1.00E+02					
									
***Output with current limiting									
Eout	404	0	401	0	1.000E+00				
Rout	404	405	RIDEAL	1.000E+00					
Lout	405	406	2.00E-08						
Cout	406	0	1.00E-12						
Voutmon	406	4	0						
Dout1	401	407	Dquiet						
Vout1	407	406	-8.00E-01						
Dout2	408	401	Dquiet						
Vout2	406	408	-8.00E-01						

***Voltage reference generator									
Eref1	98	0	99	0	1				
Eref2	51	0	50	0	1		
Rref1	98	901	Rideal	100Meg			
Rref2	901	51	Rideal	100Meg			
Eref3	75	0	901	0	1		

***Supply current correction							
Iq	99	50	0.0035				
Fsup1	99	0	Voutmon	1			
*DZsup1	0	802	DZENER2				
*Dsup1	99	802	DQUIET				
Fsup2	0	50	Voutmon	-1			
*DZsup2	804	0	DZENER2				
*Dsup2	804	50	DQUIET				

*************************************************************************
***Differential Stage							
Q1a		13a	12a	14a	npn			
Q2a		17a	2a	16a	npn			
Rc1a		98a	13a	Rideal	3.200E+00			
Rc2a		98a	17a	Rideal	3.200E+00			
Re1a		14a	15a	Rideal	3.148E+00			
Re2a		15a	16a	Rideal	3.148E+00			
Ibiasa		15a	51a	1.00E+00				
Dcmlim1a	18a	15a	DQUIET				
Vcmlim1a	18a	51a	-0.074				
							
***Voltage Noise Generation							
HVnoisea	12a	7a	Vvnoisea	1			
VVnoisea	501a	0	0				
DVnoisea	501a	0	Dvnoisea				
RVnoisea	501a	0	0.003755102				
							
***Current Noise Generation on +IN							
FInoise1a	12a	0	VInoise1a	1			
VInoise1a	502a	0	0				
DInoise1a	502a	0	DInoise1a				
RInoise1a	502a	0	8448.979592				
							
***Current Noise Generation on -IN							
FInoise2a	2a	0	VInoise2a	1			
VInoise2a	503a	0	0				
DInoise2a	503a	0	DInoise2a				
RInoise2a	503a	0	8448.979592				

***Common Mode Injection						
Rcm1a		1a	601a	Rideal	100Meg		
Rcm2a		2a	601a	Rideal	100Meg		
Gcmra		0	602a	601a	75a	1.00E-06	
Rcmr1a		602a	603a	Rideal	1Meg		
Rcmr2a		603a	604a	Rideal	1.778E+00		
Lcmra		604a	0	9.434E-05			
Ecmra		10a	9a	603a	0	1.000E+00	

***Positive Power Supply Rejection						
Epsr1a		700a	0	98a	0	1	
Rpsr1a		700a	701a	Rideal	1.00E+02		
Rpsr2a		701a	702a	Rideal	3.162E-04		
Lpsr1a		702a	0	1.007E-07			
Epsr2a		11a	10a	701a	0	1	

***Negative Power Supply Rejection					
Epsr3a		703a	0	51a	0	1
Rpsr3a		703a	704a	Rideal	1.00E+02	
Rpsr4a		704a	705a	Rideal	1.000E-04	
Lpsr2a		705a	0	3.183E-09		
Epsr4a		12a	11a	704a	0	1

***Input Offset and Bias					
Vosa		1a	7a	4.000E-05		
Iosa		1a	2a	5.000E-08		
	
***Input Impedance					
Cinva		2a	0	2.00E-12		
Cninva		1a	0	2.00E-12		
	
***1st Gain and Slew limiting					
Gslewa		0	101a	17a	13a	1.0000E+00	
Rslewa		101a	0	Rideal	2.50E+02		
Dslew1a		101a	102a	DZENER			
Dslew2a		0	102a	DZENER			
	
***Second Gain and Dominant Pole with Output Voltage Limiting						
Gp1a		51a	201a	101a	0	1.885E-06	
Rp1a		201a	51a	Rideal	2.122E+09		
Cp1a		201a	51a	1.0E-12			
Vlim1a		97a	206a	1		
Dlim1a		201a	206a	dquiet			
Vlim2a		207a	52a	1
Dlim2a		207a	201a	dquiet			
Esupref1a	97a	98a	51a	0	1	
Esupref2a	52a	51a	51a	0	1	
							
***Second Pole						
Gp2a		0	202a	201a	51a	1.00E-03	
Rp2a		202a	0	Rideal	1.00E+03		
Cp2a		202a	0	2.27364E-12			
							
***Third Pole						
Gp3a		0	203a	202a	0	1.00E-03	
Rp3a		203a	0	Rideal	1.00E+03		
Cp3a		203a	0	1.59155E-16			
***Fourth Pole						
Gp4a		0	204a	203a	0	1.00E-03	
Rp4a		204a	0	Rideal	1.00E+03		
Cp4a		204a	0	1.59155E-16			
***Fifth Pole						
Gp5a		0	205a	204a	0	1.00E-03	
Rp5a		205a	0	Rideal	1.00E+03		
Cp5a		205a	0	1.592E-16			
							
***First Zero						
Gz1a		0	301a	205a	0	1.00E-03	
Rz1a		301a	302a	Rideal	1.00E+03		
Lz1a		302a	0	1.592E-10			
***Second Zero						
Gz2a		0	303a	301a	0	1.00E-03	
Rz2a		303a	304a	Rideal	1.00E+03		
Lz2a		304a	0	1.592E-10			
***Third Zero						
Gz3a		0	305a	303a	0	1.00E-03	
Rz3a		305a	306a	Rideal	1.00E+03		
Lz3a		306a	0	1.59E-10			
							
***Buffer						
Gbufa		0	401a	305a	0	1.00E-02				
Rbufa		401a	0	Rideal	1.00E+02					
										
***Output with current limiting									
Eouta		404a	0	401a	0	1.000E+00				
Routa		404a	405a	RIDEAL	1.000E+00					
Louta		405a	406a	2.00E-08						
Couta		406a	0	1.00E-12						
Voutmona	406a	4a	0						
Dout1a		401a	407a	Dquiet						
Vout1a		407a	406a	-8.00E-01						
Dout2a		408a	401a	Dquiet						
Vout2a		406a	408a	-8.00E-01						
	
***Voltage reference generator									
Eref1a		98a	0	99	0	1				
Eref2a		51a	0	50	0	1		
Rref1a		98a	901a	Rideal	100Meg			
Rref2a		901a	51a	Rideal	100Meg			
Eref3a		75a	0	901a	0	1		
	
***Supply current correction							
Iqa		99	50	0.0035				
Fsup1a		99	0	Voutmona	1			
*DZsup1a		0	802a	DZENER2				
*Dsup1a		99	802a	DQUIET				
Fsup2a		0	50	Voutmona	-1			
*DZsup2a		804a	0	DZENER2				
*Dsup2a		804a	50	DQUIET	

*****************************************************************
Rgcnt	4	2a	Rideal	1000
Rfcnt	2a	4a	Rideal	1000 
RScnt	1a	2b	Rideal	500				
Rfb1         2              4	Rideal       1
*****************************************************************
							
.model	Rideal	res	T_ABS=-273				
.model	Rnoise	res	T_ABS=27				
.model	npn	npn	BF= 166665.666666667				
.model	dquiet	d
.model	dvnoisea	d	KF=45000				
.model	dinoise1a	d	KF=0.196				
.model	dinoise2a	d	KF=0.196					
.model	dvnoise		d	KF=45000				
.model	dinoise1	d	KF=0.196				
.model	dinoise2	d	KF=0.196
.model	dzener	d	BV=100.74508003908849
.model	dzener2	d	BV=50

.ends
			
      

      


      

      Regards,
      

      Jino
      
			
      

		
		
		
		
	
      
	
      
		
      
			
		
      
	
      
	
      
		
						
				
						
						
				
				
		
		
      
			
		
      
	
      

      

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													0
							
			
				
									
							        
			
			
			
        
            
			                            
                        
                on Sep 13, 2018 10:31 AM
            
            
												
						in reply to alexis.damiens
					
									
        
	
        

		
		
        
					
        Okay, So I checked a bit and the noise model seems to be completely out of spec.
        

        According to the datasheet with those condition we are suppose to have 12nV/sqHz @100k... ,not 400
        

         
        

        

        Kind regards.
        
			
        

		
		
		
		
	
        
	
        
		
        
			
		
        
	
        
	
        
		
						
						
				
						
				
				
		
		
        
			
		
        
	
        

        

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