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AD2S1205: Degradation of Signal

Hello, everyone:

Now use AD2S1205 to decode the rotation

When the following rotation 1 is used, it can be decoded normally without any failure.

When using spin 2 as shown in the figure below, the decoder will degrade the signal.the singal of dos is a pulse signal.

The oscilloscope measures the related signals. The rotation 1 excitation signal is 1V~10V sine wave, and the sine and sinl are 0.5V~2.9V sine wave with opposite phase.

Rotation 2 excitation signal: 1V~10V sine wave, sine and sinl: -0.5V~3.8V sine wave, phase opposite.,

Question: 1. Can the rotary decoder chip work normally under the condition of signal degradation?2. If it doesn't work properly, how can I correct it?

Thank you very much!~

  • Let me see if I can help.

    The major difference between the two resolvers is the transformation ration (0.286 for the first and 0.5 for the resolver causing the issue ~1.75x).

    What I'm having trouble understanding is exactly how you are notating the excitation and output voltages so let me explain it this way.

    Let's assume that the output excitation voltage is 9Vpp differentially across EXC/EXCb or 4.5Vpp on either output in antiphase.  Simply multiplying by the transformation ratio of each resolver versus these values results in.

    Resolver Differential Excitation(Vpp) Tr Input Differential (Vpp)
    1 9 0.286 2.574
    2 9 0.5 4.5

    In the second resolver case we exceed the peak differential sinusoid allowed into the input of the RDC and thus the indication of DOS.

    The simple fix to this is to reduce the excitation voltage by 11-12% such that the peak voltage through at the output falls within the 4.0Vpp limit.  Alternatively you can insert an attenuation network at the output of the resolver to introduce the shift.  Just be careful how you implement the latter option to maintain the common mode voltage for each input such that 1) you don't introduce significant mismatch between SIN and COS channels and such that you maintain the input common mode voltage such that the input excitation doesn't clip either rail.


  • hi,sean

    Thank  you very much your replying.

    I am sorry  for my inaccurate expression before.

    now, I have made some change,but it still have the same degradation of the I updated  the date.

    Firstly, the signal of exc or /exc is as following:

    then,the signal of R1/R2 is as following:

    now the differentially excitition(Vpp) is 8.5V and the input differential is 4.25V which  exceed the threshold value(4.2V)

    but  after  processing the signal ,at last  the singal of sin/sinlO  input to AD2S1205(2.5Vpp)  is as following;

    Now it already satisfy the theshold, but  still degradation of the signa occurred.

    Could  you help me answer the question again?

    In addition,can the RDC  work normally when the degradation of the signa occurred?

    Thank you very much.

    best regards


  • Hi, my english may be not good enough, but I hope that I could anwswer your question.

    Even if the wareform of R1/R2 seems to  be normal,  input differential still exceeds Sin/Cos threshold which is claimed in ADI specification. Under this condition, DOS pin is set to low. Maybe you could reduce the excitation voltage a little more as  said in last reply.

    best regards