Hello friends,
I wish to do a noise simulation on a current source controller using the LT1167 instrumentation amplifier and the AD8672 low noise op-amp. what is the correct approach for noise simulation on a indirect feedback circuit like this? In LTspice, the noise simulation requires an ac noise. Attached is the circuit configured in its normal operating condition. I wish to find the total output noise from the LT1167 inputs to Vout. where should i connect my noise voltage V4 so my Vout noise is the sum of the two ICs assuming resistors are noiseless?
Thank you in advance for you help!
Current source noise.zip
Hi Zheng529,
LTspice and other simulators do require an AC source to be present for computing gain from that source to where you specify the output to be. However, for straight-up noise output noise density or RMS noise numbers, you don't need to connect the AC source if you don't need to. You could just place V4 on your schematic and leave it not connected and look at V(onoise) for output noise density. You could have just assigned an AC value to your V3 DC source and the output noise simulation would have worked just the same.
If you want to see the LT1167 noise by itself, you would then specify the LT1167 as the "Output" under :""Edit" Simulation Cmd", and when you plot V(onoise), you'll get the contribution from the LT1167 (assuming the feedback from R3 is negligible noise contribution).
Hope this makes sense. If not, please let me know and I'll see if I can help.
Regards,
Hooman
Hello Hooman,
Thank you so much for your reply. I tried what you recommended and the results are interesting.
In the circuit, U1 (LT1176) is configured with gain of 10x and the simulated noise voltage density matches with my hand calculation ~100nV/sqrt(hz) only if i delete R5. From the datasheet, majority of the noise from U1 are from the input and the output 7.5nV/sqrt(hz) and 67nV/sqrt(hz), respectively. That equates to 100.57nV/sqrt(hz) which matches with the simulated noise 100.52nV/sqrt(hz) at 10khz.
For my final noise Vout at 10Khz the simulated noise is 124.6nV/sqrt(hz) with R5 installed and about 932pV/sqrt(hz) without R5 installed. I know the latter is wrong and the first value look very reasonable but is it correct? The system has a gain of 10 but U2(AD8672) is an integrator and the noise gain changes with frequency. Can you please explain what is the noise gain on U2? I tried the to use 1+Zf/Zin and did not get the result from the simulation.
Forgot to mention that i updated all the resistors to noiseless for all the simulation results.
Thanks,
JZheng529
Hi jzheng529,
I've looked at your simulation and found the following:
The LT1167 LTspice noise simulation / model does not like to see as low a load as you have (R2, 1kohm). With this load, the simulation seems to break down and look abnormally low noise.
In the zip file below, I've increased R2 to 100k and now I don't see the pV/RtHz numbers you / I see under some conditions, but instead see the ~100nv/RtHz expected. I've additionally moved V(out) to the LT1167 output directly so that the AD8672 does not get into the analysis.
Please take a look at this simulation file to see if this behaves more closely to expected results because of the lighter load (R2 increased to 100k). If so, then we can look at what could be the underlying issue that makes the LT1167 noise model misbehave with a heavier load like 1k:
Current source noise R2_increased modified 11_4_19.zip
Please let me know if this modification above resolves your issue or not so that we can continue the discussion to see if the LT1167 needs to be updated or not?
The LT1167 simulated output noise is affected by the integrator that follows when R2 is 1k. By raising R2, I've effectively eliminated this interaction. There is nothing wrong with the LT1167 LTspice noise model by itself with a light (100k) or heavy (1k) load. I verified this by running noise analysis on LT1167 stand-alone and the output loading (1k) does not show any adverse effects!
I'd guess that the fact that there is no actual signal present in your simulation, and that you're not resetting the integrator at any time, is causing the AD8672 to enter a strange state which in turn is affecting the previous stage (LT1167) if R2 is small enough. May be it's best for noise simulation to separate the two stages or otherwise devise a way to reset the integrator so it stays in active region.
Correction to my comments above:
You are probing the simulated LT1167 noise while there is an active feedback loop closed around the LT1167 and an integrator / MOSFET that follows. Under these conditions, the simulated noise at the LT1167 output will not be equal to its intrinsic noise parameters times the gain (in fact it reads much lower) because the feedback loop affects the measured noise within the loop.
If the component values are changed such that the loop moves out of its active region (e.g. R2 increased from 1k to 100k), the loop is essentially broken and only then the noise readings look "reasonable". I had originally made the mistake thinking that the LT1167 loading was the culprit but I had failed to realize the action of the feedback loop.
Even though the LT1167 noise itself looks unreasonable measured this way the way you're leaving the loop closed, the simulated noise should still be valid as it involves the action of the feedback loop and coherent and incoherent noise sources.