AD9250
Recommended for New Designs
The AD9250 is a dual, 14-bit ADC with sampling speeds of up to 250 MSPS. The AD9250 is designed to support communications applications where low cost,...
Datasheet
AD9250 on Analog.com
ADA4930-1
Recommended for New Designs
The ADA4930-1/ADA4930-2 are very low noise, low distortion, high speed differential amplifiers. They are an ideal choice for driving 1.8 V high performance...
Datasheet
ADA4930-1 on Analog.com
Hi, I'm running simulation for ADA4930 model already available on LTSPICE (XVII). The purpose is to feed differential output to ADC, AD9250, that supplies the Vocm of 0.9V.
The scheme is just single input sinus of 2Vpp, 5V supply, 0.9Vocm, gain G=1 with Rf and Rg = 301ohm, and no input impedance matching for now in order to simplify the analysis. I get the following :
I got the following, in red Vin=2Vpp, blue Vout+ and in green Vout-.
I don't understand why Vout+ and Vout- are clipped at Vout+min = 0.6V and Vout-max = 1.2V. The output range from the datasheet is well between the 0,18V to 3.38V output voltage min and max voltages recommended, Vpp max is 2V, and Vocm must be between 0.3 and 2.8V.
So to me here everything should be ok, why are these outputs clipped ?
Thanks
Hi Gilbeys,
My bad I really thought I shared the schematic, here it is :
I believe the /SHDN should be set high in order to enable the aop, that is why you got a voltage amplitude much smaller while the gain is set to 1.
Can you try again to see if the output is clipped ? I suppose this might be due to model inaccuracy because I don't see why negative voltage wouldn't be allowed !
Regards,
Hi Rleduc ,
Good day. I was verifying the model in the LTSpice and it seems that there was an inaccuracy with it. You can try to use the model of ADA4930 which is available in the ADA4930-1 webpage (https://www.analog.com/en/products/ada4930-1.html). I tried to verify the circuit using this model and it works fine:
With regards to the model found on LTSpice, I'll try to coordinate it with the team. Hope this helps.
Regards,
Gilbeys
Hey,
This makes more sense, thank you very much I will do so !
Regards,
Hi Gilbeys,
I am facing issues in simulating ADA4930-1 in a differential amplifier configuration. As suggested by you in this thread, I tried using the AD4930 model as well but the pin definitions are quite weird for that one also the results were not as expected. Could you please provide proper spice model for simulation.
Thanks in advance.
Regards,
Kritika