ADA4927 Power Down Pin

Hello, I have a question about this feature, in the data sheet says:

The power-down feature can reduce power consumption when a particular device is not in use and does not place the output in a high-Z state when asserted. The ADA4927 is generally enabled by pulling the power-down pin to the positive supply. See the Specifications tables for the specific voltages required to assert and deassert the power-down feature.

So, I'm wondering if these "does not" it's correct? I mean, when PD pin it's low the output is placed to High-z or not?

Regards!

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