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AD9288 - Common Mode Input Range

Hello All,

I am working with the AD9288 ADC. I have a DC coupled application, and single ended inputs. I am considering doing a single ended only implementation or a single ended to differential conversion.

1) On page 14 of the datasheet, it says "The nominal input range is 1.024 V p-p centered at VD × 0.3." If I use a VD (analog supply voltage) of 3.0V, that would correspond to a 900mV common mode bias point (correct?) If the input range is 1.024V, that would tell me that my upper range is 0.9 + 0.512 = 1.412V and my lower range is 0.9 - 0.512 = 0.388V. Are these calculations correct?

VD*0.3 center voltage seems a bit odd to me. I am used to single supply systems with the virtual ground being around 1/2 Vsupply. Can the AD9288 be modified to accept a common mode voltage range of (1/2)*3V = 1.5V? Will this significantly degrade performance?

2) If I choose to retain a fully single ended signal, should I layout a similar arrangement as the AD9281's datasheet on page 10 figure 22 (0V - 1V input)?

Thank you for your suggestions,


  • Hi AlexB,

    You're calculations seem to be correct, and are consistant with both the Spec table on Analog Inputs (page 3 ) and the text on page 14.

    The common mode range si set by the input design, and departing from it will result in significant perfomance degredation.The schmatic of the eval board can be copied to speed you design of the input section and obtain proper common mode bias.

    No driving the ADC differentially will cause a loss of perfomance. The requirement remains for a common mode range as previously described. THe implimentation on the AD9281 does not achieve that requirement.

    A diff amp would be a good solution, and you can use the Diff Amp tool to select and configure it.

    Hope that helps.

  • Chris,

    Thanks for the quick reply. Now that I know that I must drive the 900mV common mode voltage, I need to figure out how that can be generated. Going back to the AD9288 datasheet, it appears that the Vref out is 1.25 V. Is this a buffered or un-buffered voltage reference? I was thinking of putting a voltage divider on it to generate 900mV, and then buffering that with an opamp to drive the common mode setting pins of the drive amplifiers. Is this a good approach? Alternatively, I suppose that I could use a DAC to set the common mode setting pins of the drive amplifiers.

    Do you have a suggestion as to which method would be better? Is there another method that I could employ?



  • Alex,

    First, regarding using the internal VRef for assiting in the level shift - in this case the Vref internal to the part is not buffered, and is only designed to drive the Vref inputs for the ADC itself, (see fig 18). If the Vref was buffered, then carefull application of the Vref can generally be done, but alais, not in this case.

    The front end cirucuit you reference on the AD9281 datasheet is a circuit is dependant upon that ref being a buffered source, so it won't work.

    The ADA4930 would be a good solution to use as the driver.  You can generate the VCM reference from a resister divider off the supply instead of the reference.

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