I'm currently working on an high voltage 8 channel data acquisition system controlled by an Cyclone II FPGA. The general requirements are:
- 8 fully differential input channels
- precision measurement
- source independent measurement
- Signals from DC to 1MHz
- Input voltage range: (Up-Un) = -30V .. +30V
- Common Mode range (Up+Un)/2 = +-80V
- ESD & over voltage protection
- small package size, SMT
- ease of use (digital interfacing) -> SPI, I2C
My research showed that the 5MSPS, 12bit ADC AD7356 could be the fitting candidate. Analog proposes the AD8138 for analog interfacing. In an older version of our system we use an Instrumentation Amplifier (IA) circuit, build from single components (2 input amplifier, 1 differential amplifier, resistors and capacitors for decoupling and filtering).
Now my questions:
I attached an *.pdf document which lists the requirements and explains our status quo.
Thank you in advance.
Yes, I think the AD7356 could be a suitable candidate for your needs. We also have a pin for pin compatible part, the AD7357, which is 14 bits and 4.2MSPS which may also be of interest.
In terms of driving the ADC, you probably already know, but in order to maintain full performance of the ADC you have to be careful to ensure that the driver can fully settle the input capacitor network of the ADC as it goes from acqusition phase to convert phase and back to acquistion phase. We can certainly provide some other recommended drivers for this part if you want? Although, we don't have an integrated IA that will be able to satisfy the driving requirement of this ADC/sampling rate combination.
We may also have some high speed ADCs that you could look at if interested. You should post the same question in the High Speed ADC section of Engineer Zone for a response on those parts.
I hope this helps.
thank you for your fast response. I think the AD7356 is fitting for our application. To drive the ADC I chose the following amps:
Thanks for your help.
If you are worried about ensuring all channels in your data acquisition system are simultaneously sampled, the major signal that you need to be concerned with is the CS rather than the SCLKs. The falling edge of CS on these parts is the sampling instance. If all of the CS inputs are coincident, you will have simultaneous sampling, even if the SCLKs are slightly skewed.