I am attempting to reset the capacitor of an integrator circuit by shutting down the chip (driving pin 8 with a 4 usec low-active pulse) and pulling the output down with a 10K resistor (capacitor is 3.3 pF). Discharge of the capacitor should occur through the input protection diodes. Circuit behavior indicates that the integration function does not occur as the output moves from low to high at 620 nsec following the trailing edge of the shutdown pulse. The negative input is observed to come to -320 mV and stay there, regardless of the drive voltage.
In essence, is there a delay time after release of shutdown until amplifier operation resumes? What is the behavior at the inputs during shutdown until recovery is complete?
Hi,Ton and Toff are actually specified on the datasheet. Ton is spec'd at 580ns typical. The input should be the same during shutdown, only the output stage changes behavior it'll be Hi-Z.Regards,Goz
This integrator trick seems interesting to me, could you name the materials about it?
The circuit operation will depend upon discharging the integrating capacitor through the negative input protection structure to negative supply (ground). Integration requires that the output make a clean transition from low to high and simply trusting the chip to wake up predictably with the positive input at half supply is not working.
I am now debugging a circuit to hold the positive input at low supply for one microsecond after the release of the dIsable signal (which itself is 1.25 usec long). Since the circuit is basically an electrometer it is not possible to pre-condition the negative input (test configuration has it connected with a resistance to a small voltage below mid-supply).
I'll be happy to post the schematic when I get it working. It measures very low currents from very high impedance sources.