Pluto Tx/Rx

Question

So far I have been working with one Pluto device Tx and Rx, and now with two Plutos connected to the same host. I have been using simple Python script and the dedicated SW interface. 
 
 I would like to try out some of the "loopback" options in order to test Tx and Rx functionalities on the same Pluto device. I have tried with an analog thru cable + attenuator, loopback digital and RF. I don't see much differences. Are there some public example to test? Can you help me out a bit? Can you tell more about the BIST feature too? 
 I am using the simple functions sdr.tx() and sdr.tx() to start transmit and receive:
 
 Are these functions running in somehow parallel way in the SDR? 
 if I want to transmit with cyclic buffer, I first use sdr.tx() and then I can receive a given number of samples by calling sdr.rx(). But how can I transmit a time-framed signal with no cyclic buffer? I mean, like a pulse-like signal for example. What if I call first sdr.rx() with a large buffer and then sdr.tx()? 
 how big are the tx and rx buffers sizes? Those are pure software buffers or somehow related to what happens physically in the SDRs?

In Pluto we have 12 bit ADC/DAC. So I should convert to 12-bit fixed-point the data I want to Tx, in order to use full dynamic range? 
 I have so far basically used only FDD and TDD ENSM modes. Can you please help me to understand also the other modes? 
 
 Thanks

travisfcollins · Accepted Answer

1. Here is a basic example of Pluto talking to itself: https://github.com/analogdevicesinc/pyadi-iio/blob/master/examples/pluto.py If you want to understand the BIST modes please read the transceiver userguide UG-570 https://form.analog.com/Form_Pages/Catalina/CatalinaDesign.aspx?prodid=AD9361 
 2. a. The tx and rx method simply queue and dequeue data from buffers on the device. They do not happen in parallel. 
 b. There is no inherit synchronization between TX and RX. You would need to work inside the FPGA to perform gating or relative operations on both paths. 
 c. The buffers are just talking about memory usage on the physical device. Pluto has 512 MB of DDR which is used to store samples but that needs to be shared with the OS. Its limited based on the width of the DMA (usually not an issue), the CMA in the kernel, and the IIO block size. More details here: https://wiki.analog.com/resources/tools-software/linux-software/libiio_tips_tricks#buffer_handling_sizes_and_counts 
 https://wiki.analog.com/software/linux/docs/iio/iio?s[]=circular&s[]=buffer#iio_ring_bufferkfifo 
 https://wiki.analog.com/resources/tools-software/linux-software/libiio_internals#the_network_backend_and_iio_daemon 
 3. No. The FPGA assumes a 16-bit full-scale sample and removes the lower 4 bits. Always provide a 16-bit scaled signal. 
 4. Look at UG-570 for more information. 
 
 -Travis

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Pluto Tx/Rx

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