Hi! I'm modifying the PlutoSDR reference design and I need to optimize the FPGA resources. It would be possible to remove the AXI Quad SPI? What is the function in the design?
Thanks
Hi! I'm modifying the PlutoSDR reference design and I need to optimize the FPGA resources. It would be possible to remove the AXI Quad SPI? What is the function in the design?
Thanks
Quad SPI is used to boot the board. That is the flash that is connected to the processor.
To avoid confusion I will add some clarifications.
There are 3 SPI interfaces on the pluto.
1. PS QSPI (MIO PINS) - used to program the system from QSPI flash.
2. PS SPI0 (EMIO) - used to control the AD9363
3. PL axi_spi - It is defined as a software SPI, can be accessed from the user space by the users to read/write data form other devices(e.g. sensors).