AD7920 12-bit ADC lab

Hi, 

From the picture of your layout it seems that you connected the decoupling capacitor (and I think Vp)  to pin 4 instead of pin 1.

I suggest that you double check the wiring of your circuit according to AD7920 datasheet. 

As you point out, the chip layout and the layout in figure 22 may be mirrored but the pinout still corresponds.  The pinout of some of the breakout boards is mirrored to maintain the spacing and maximize available breadboard connection points.

No matter the chip orientation on the webpage layout, you should do the connections according to the pin number. 

Pin 1 of the chip is marked on the breakout board with 1 and the pin is square.

Regards,

Andreea

I have reworked the wiring assuming the chip layout is:

top  5 6 7 8
bot: 4 3 2 1

The result is the same:  All the screens look the same as above and there is no output on the Logic Analyzer.

I do note the the oscilloscope does not detect constant voltages, either the 3 volt power supply or the 1.5 volt signal generator.

I set the trigger with a rising edge of value 1.024

Do you have any suggestions ?

Thanks !

Hi,

The wiring look correct so the circuit should work now.

In the lab activity it is mentioned that you should enable DIO1 in the patter generator. From the above screenshots I can see that you also enabled DIO0 and DIO2 even if they are set to 0. Try to have only DIO1 configured as clock in Pattern generator. Then you can control the state of DIO0 (which is the CS# signal) from the Digital I/O tool. 

You pointed out that the oscilloscope does not detect the voltages. Does this happen if you measure at the pins of the breakout board or in other cases too? If you loopback the signal generator directly into the osciloscope you should be able to see the 1.5V constant signal. 

Regards,

Andreea

Hi Andreea,

Thanks for your reply.

This project still does not work.  The oscilloscope works great for other waveforms [sine, triangle, etc], but not for a constant signal, as there is nothing to trigger it.  Here are my current screens:

Hi, 

For this particular project you do not have to set the trigger of the oscilloscope, only the trigger of the Logic analyzer channels, as explained in the wiki activity. Double check to have the correct trigger settings because Scopy has been updated since the wiki activity was written.

You have to toggle the DIO0 (CS#) from the Digital I/O tool. In your last screenshots I can see that the DIO0 is now available, and configured as output, but is in low state. Set DIO0 in high state, and then to initiate a conversion toggle it  to low. If the falling edge of CS# and the low state of CLK happen the same time, the conversion is initiated and you should see the output signal as well as MISO hexadecimal data in Logic Analyzer.  You can set te DIO0 high again, and only set it low when you want another conversion to start.

Regards,

Andreea

Hi Andrea,

I now have the oscilloscope working:

and toggle the DIO 0 from 1 to 0

The logic analyzer is on AND and now triggered from the oscilloscope:

with these logic analyzer settings:

but the MISO bit and data fields remain at 0 when I toggle DIO 0 from 1 to 0.

When DIO 0 is "1" the SPI field is not present. Toggling it to "0" then gives the filed in the above screen.

Any suggestions ?

Thanks.

Ron

Update:  I can now get this screen with the signal generator at 1.5V and Power Supply at 3V.

Any suggestions as to why it does not show 07 FB as in the project web page ?

Hi Ron,

I don't see any falling edge  of the CS signal in your screenshot. This should trigger the conversion. I think the SPI is not configured correctly in the logic analyzer.

Is the same value read even if you change the output value of the signal generator? Could you please check the wiring again, because it seems like the ADC is reading a voltage equal to its Vref and I think maybe that's why it decodes 0xFFFF.

Regards, 

Andreea

Hi Andrea,

Everything appears to be set up correctly, but I still do not get the correct results:

Here are the SPI settings:

Here is the wiring:

What else should I investigate to create the falling edge in the CS signal ?

Thanks.

Ron

Also, I get the same logic analyzer screen if the signal generator is set to 1.5, 1.4, 1.2 V, etc.  But the reference voltage Vp = 3.0, so a FF output still does not make sense.

Also, I get the same logic analyzer screen if the signal generator is set to 1.5, 1.4, 1.2 V, etc.  But the reference voltage Vp = 3.0, so a FF output still does not make sense.

Hi Ron,

I tried to redo the setup with the newest Scopy version.

This is my result in Logic analyzer when the signal generator is set to 1.5V. It is not the same value as in the activity, but if decoded using the formula in the documentation, the hex value corresponds to 1.558V which is an acceptable result.

These are my Logic Analyzer settings, with a SPI Decoder enabled

The CS signal is created in Digital IO Tool. After you make all the other instrument settings,  you can detach Digital IO tool (find this option in Preferences menu, it it is not already active on your device).Enable the Digital IO, clicking on Run, then with DIO0 set as output, alternatively click on 1 and 0 to change its state and create the CS signal.

If you are still not able to receive data from the ADC after these steps, your AD7920 may be damaged (maybe as a consequence of the reverse wiring from the beginning). I tried this experiment with two different AD7920 and one of them was also broken. What I noticed and helped me determine that the IC is broken was that the VDC Measure of the M2K Power supply was not accurate, reading ~2.5V instead of 3V which I set.

Regards,

Andreea

Hi Andreea,

Thanks so much for your support on this project.

I do measure 3V and 1.5V for the Power Supply and Signal Generator on the Voltmeter, thus I am not sure if the chip is broken or not.

Unfortunately, I still cannot get it to work, and it is time to move onto a different project.

Regards,

Ron