TDD sync

Hello,

So, "sync_internal" is when you have a configured internal signal to be generated based on a dedicated counter, and it happens continuously in the design without any other sync request. When enabling "sync_external" it means you have an external GPIO tied, and the pulses are generated by triggering said GPIO.

The "sync_soft" mechanism a soft pulse that triggers the burst in the tdd channels, simply by writing 1 to the sync_soft attribute.

 
I attach here a link to the wiki for a slightly more detailed explanation of the 3 modes:
https://wiki.analog.com/resources/fpga/docs/axi_tdd#detailed_description

Best Regards,
Ramona