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TDD external sync modification

Category: Hardware
Product Number: Stingray

I am pulsing XUD1A interposer board, Pin-15 of P3 header with a 3.3V to get the TDD started. It was working fine for the most part but I am not able to get the TDD working recently. Not sure if the interposer board has issues.

Is there any other way to provide an external sync signal to get the TDD started? Could the HDL be modified to provide the external sync using an AXI signal?