AD9082 Configuration Not Reflecting on Board View in ACE Tools

Hi Emmet42 ,

Apologies for the delayed reply,

It sounds like the values are not being applied when you configure them in the AD9082 tab (chip view) for some reason, the changes should be reflected in the AD9082-FMCA-EBZ tab (board view).

There are a couple of things you could try here to determine the cause of the issue:

• When you have configured the settings in the chip view, ensure you press the Apply button at the bottom of the Wizard, then check if the settings have updated.
• If they have not, as you have described, then try selecting the Apply Changes button in the top left of the chip view, then check again whether the changes have been reflected.
• If not, drop down the "Tools" menu in the left sidebar, then open the Events window and check if there are any errors shown that might indicate why the settings were not applied. It's possible there is a validation error somewhere that is preventing the settings from being applied, such as below:
• 

If the above suggestions do not result in any changed behaviour, please click the menu button in the top right corner of your ACE window, select Show Log File, then save that file and attach it in a reply here so that we can debug further. Please note that this file resets each time you open ACE, so make sure to open and save the file after reproducing the error.

Hopefully this helps,

Thanks,
Eoin

Hi Eoin,

Thanks for the reply, I have attempted to repeat all the steps you have requested me to do but let me walk you through the steps I have performed for a configuration on the AD9082.

1.Turned on the device and have the SMA cable connecting DAC0 and ADC0 together in loopback.

2. Launched ACE Tools, in the Attached Hardware view the AD9082-FMCA-EBZ is listed, but is shown as "Unverified".

3. Double clicked the attached hardware which launches the System tab and AD9082-FMCA-EBZ tab.

4. In the AD9082-FMCA-EBZ tab, the use case is selected as DAC@12.0Ghz(1.5GSPS I/Q), ADC@6.0GhzJESD204C (4D2A ADC Full Bandwidth)

5. HMC7044 is selected as the Clock Source.

6. I cannot configure the rest of the board settings, so I now press the Apply button.

7. The configuration is applied with the State=Good, in the board layout, I select the AD AD9082 block to launch the Chip View.

8. With the Chip View loaded, I press the "Update JESD Status" and statuses are all in the green.

9. I then configure my setting for my use case:
Operating Mode: Transceiver

Clock Source: HMC7044

NCO Test Mode: SERDES Mode

JESD Standard: JESD204C

Tx JESD Link0 Mode: 17
Rx JESD Link0 Mode: 18

Tx Data Rate: 2000Msps
Rx Data Rate: 2000Msps

Tx Fine/Coarse Interpolation:-
Tx Fine DUC: 1x
Tx Coarse DUC: 6x

Tx Coarse DUC NCO Freq: All at 1.68Ghz

Rx Coarse/Fine Decimation:-
Enable Full BW Mode: DDC On,
Rx Coarse DDC Dec Ratio: 3x,
Rx Coarse NCO Mode: Variable IF mode.
Rx Fine DDC Dec Ratio: 1x
Rx Fine NCO Mode: Zero IF mode

Rx Coarse DDC NCO Freq: All at 1.6Ghz

The rest of the settings I leave as DEFAULT, I don't have any messages of Error Type

The only message that I get is a Warning on Tx Lane Line Rate stating: "DeviceParameterViewModel, Tx Link Lane Line Rate Error, ValueInvalid, DAC JESD Link Lane Line rate greater than 16.22 Gbps is not supported." but this does not cause an issue on my colleague's .cso file.

10. I press the Apply button. Going back to the AD9082-FMCA-EBZ tab I see no changes. I return to the AD9082 tab and press the top-right Apply Changes, still no change in the other tab.

I can't copy across the log file remotely currently but I will try again tomorrow.

Hi Emmet42 ,

Thanks for your reply and detailed steps to reproduce. I unfortunately do not have hardware on hand for the AD9082 to reproduce this at the moment, but reading through your reply there are a couple of things that stand out to me:

• You mention that your plug-in appears as "unverified" in the Attached Hardware view. This could cause some issues as if you have an unverified plug-in then that would indicate that you have a pre-release or a development plug-in which has not undergone the same QA process that verified released plug-ins have, which can often be the cause of issues.
  Can I ask where you got this plug-in? Did you install from within the ACE application using the plug-in manager or did you install via an ACEZIP (and if so, what was the source)?
  In any case, it would be best to move to a verified version of the plug-in in order to ensure that this is not the cause of the issue, and that we are using the latest version for debugging efforts (This could also be a reason for differences between your config and your colleague's, may be worth checking what version they are on). You can open the plug-in manager in ACE from the left sidebar and check for updates available to the Board.AD9988 plug-in (which contains the AD9082 plug-in), if it doesn't show in updates then uninstall the Board.AD9988 plug-in from the Installed tab and then install the latest version from the Available Packages tab. The latest version is 1.2023.48201.
  This may help to address your issues.
  
  
• You mentioned that you get a validation warning on the Tx Lane Line Rate, this is likely a cause of the issue you are seeing where your settings are not applying. I can't tell for sure without hardware myself to test or a log file, but I would expect that the settings you have selected do not get applied as they are not valid, and will not apply until the warning is addressed (by changing some config to bring the Line Rate within the allowed parameters). I know you mentioned that this does not cause an issue in your colleague's file, but given you are on an unverified version of the plug-in, it's possible that they are on a different version to you, although without details of your colleague's environment or log file, this is speculation. Regardless, in the current plug-in you have installed, if there is an error appearing, this is likely what is preventing your settings from being applied.

For right now, without being able to reproduce on my end, and without log details from your system, I unfortunately can't offer any other theories as to what the cause could be. I would strongly advise trying to move on to the latest verified version of the plug-in. If this does not resolve the issue, at that point I would consider moving this thread to the High Speed ADCs forum as the product experts there may be able to provide more product specific advice on your configuration settings.

Hopefully this helps,

Thanks
Eoin

Hi Eoin,

It would have been via ACEZIP as this is a lab PC on a separate network. I'll look into updating Board.AD9988 with the latest package. However, my colleague used the same machine as I did with the same version of ACE.

If I load their .cso file I don't have any issues, the board and chip share the same configuration but if I try to perform the same thing from scratch, the board and chip are different. The Tx Lane Line Rate doesn't appear to be causing issues with the saved .cso file. 

Thanks,

Emmet

Hi Eoin,

Sorry for the delay, here is the log file:

JESD204C-Kuka-test-case.txt

Kind regards,

Emmet

Hi Emmet42 ,

Thanks for forwarding that on, 

I can see a number of issues in the log file that may be causing some problems:

• Firstly, with regards to the unverified plug-in, I'm seeing validation errors in the log for every plug-in, which looks to be due to the signing certificate being out of date. I can see that you are using ACE version 1.28, which is an older version whose certificate has run out. The latest version 1.30 would resolve this. Regardless of the unverified warning, I can see the version of the plug-in you are using is version 1.2023.39600, so I would recommend updating to the latest version 1.2023.48201 in order to rule out this as a cause, as there may have been bug fixes merged in the interim.
• Regarding the validation errors, I can see a number of these in the log, which would definitely contribute to your issue as described above, the validation errors are preventing the settings from being applied which is why you are not seeing your board and chip values matching:

  System.InvalidOperationException: Error setting parameter virtual-parameter-lane_line_rate_rx_link0 to 49500000000.00000: Value must be between 0 and 25000000000
  System.InvalidOperationException: Error setting parameter virtual-parameter-lane_line_rate_rx_link1 to 49500000000.00000: Value must be between 0 and 25000000000
  System.InvalidOperationException: Error setting parameter virtual-parameter-dac_clk_rate to 16000000000: Value must be between 2850000000 and 12600000000
  System.InvalidOperationException: Error setting parameter virtual-parameter-dac_clk_rate to 16000000000: Value must be between 2850000000 and 12600000000
  System.InvalidOperationException: Error setting parameter virtual-parameter-dac_clk_rate to 24000000000: Value must be between 2850000000 and 12600000000
  System.InvalidOperationException: Error setting parameter virtual-parameter-dac_clk_rate to 16000000000: Value must be between 2850000000 and 12600000000

• As for your colleague's cso file allowing the values there are two possibilities I can think of that would explain this behavior. The first, and simplest explanation, is that there is a difference somewhere in the settings in that cso file and the settings you are trying to set that is changing the allowed rates for these parameters. There are numerous configuration settings in this plug-in, so there is a chance that one of these modes or values is set differently, and therefore changing the allowed range of values for the parameters that are throwing issues for you listed above.
• The other possible cause is due to the way that a cso file is loaded. When a session (cso file) is loaded in ACE, it reads the parameters in from a file and sets them in the backend, which can sometimes bypass the frontend validation rules that you are seeing issues with and that are blocking you from applying these settings manually. If the parameters in the cso file are exactly the same as the ones you are entering (i.e. not the case in the previous bullet point), they may be "sneaking past security" so to speak. If you are prevented from setting this configuration manually, there is a reason for this, these validation rules are configured by the product experts, but unfortunately we cannot provide that level of support on this forum, so as I mentioned previously it may be best to move this thread to the High Speed ADCs forum if you want to enquire why this config is not allowed.

In any case, if you still see these same validation warnings on the latest version of the plug-in, and have validated that your colleague's cso file has the exact same values for all config parameters, then I think it may be best to consider the cso file an anomaly as detailed above, that may have slipped past the guard rails. If you end up in this situation, I think it would be best to contact the product team to see why this configuration is not allowed and appears to work with your colleague's cso file. 

Apologies that I cannot be of more help on this issue, 

Thanks

Eoin