ad9174-fmc-ebz on zcu102

I am using the reference design daq2 on zcu102 rev 1.1 board. For this I downloaded the 2021-02-23-ADI-Kuiper.img from  

https://wiki.analog.com/resources/tools-software/linux-software/embedded_arm_images

From this .img file, I am using the boot files from the zynqmp-zcu102-rev10-ad9172-fmc-ebz-mode4 folder on a AD9174-FMC-EBZ board. I have connected to the DAC board from my laptop through the min-usb terminal and opened an ACE window on my laptop. I also have a linux terminal running through serial port on the zcu102 board and I can use iio_reg commands on the fpga.


Q1:I want to see the reference design working with the JESD links showing green lights on the ACE software. For this, can you please point to the set of steps necessary to program the registers on the FPGA (to program the TX_JESD_TPL module and any other startup enable bits etc) and on the DAC board (to program both the AD9174 chip as well as the HMC7044 chip)? Please note that I am unable to use the HDMI output or the keyboard/mouse because I have been told by ADI that the HDMI driver does not work on the Zynq (ZCU102) board. I am able to use the iio_reg command at the serial terminal running on the zcu102 board. Here is the output of the iio_info output and an example of a board register read operation:

Q2. Is it possible to program both the fpga and the ADI Dac card via iio and be completely free(and disconnected) from ACE, or is it possible to program fpga via iio  and the dac card via ACE, (will there be contention from fpga driving spi via fmc and the tx dac card onboard connection to ACE)
Q3. Is there any documentation or ACE config file for either of the above for programming sequence, as to initiate the fpga jesd and the dac jesd to configure, sync and lock the high speed interface, or where can we find some documentation describing the minimum necessary configuration for the reference design?
Q4: Is there an example script or document that programs up the reference design that we can use?
Thanks.


  • Just a quick correction - the project I am using is the dac_fmc_ebz project (not daq2)

  • Here is an update since I posted the original question 3 days ago. I have been able to connect to the carrier board (zcu102) rev 1.1 via the iio oscilloscope running on the laptop connected to the zcu102 board via ethernet. I am looking for the minimum number of steps necessary to get the DAC to output a tone. I am assuming that there might exist a configuration file for the ACE sw to program the reference design so that the jesd link works properly. Please help!!

  • 0
    •  Analog Employees 
    on Jun 17, 2021 1:43 PM in reply to satadi

    The ACE software only controls/set registers on the Xenon chip, all the FPGA configuration is done through DPG Download (Lite). If you can find a configuration that meets your need using plug-in wizard, then you can record a ACE Macro with Macro tool included in ACE. The ACE Macro contains all necessary register transactions to configure the chip, then you can port it to your own system. However, I have no insight on the FPGA side, all the FPGA configuration is contained inside DPG Downloader. The person who develop DPG Downloader no longer works on the software, it may take longer time to get your answer.