AD2437 main ↔︎ AD2428 sub — is ANY register setting or circuit change able to make them interoperate?

> Is 9 V simply below what the AD2437's line-fault diagnostics can operate with, and is that the likely cause of the 0x2A?
Yes.  I seem to remember the AD2437 starts to show failures < 10V typical.
You safe bet when downstream nodes are AD2425 is the AD24347 main node does not have the hardware to provide bus power (so a software bug won't blow something up), and you first AD2428 node be locally powered.There are fancier ways to do mixed CFG0/CFG4 systems but it can get complicated quickly if you want to allow arbitrary setups.

> Setting SWBYP = 1 gets us through discovery cleanly ,amplifier never comes up.
Though this seems odd, you say it discovers the amp node but won't program the AD2428 to operate correctly?  Or something else?

>  while keeping SWBYP = 1, is that a configuration you have seen work in practice?
I would have to go rerun experiments - I think at some point the AD24xx wants to see power turned on but I definitely could be misremembering.  As a general concept though you can provide "bus" power independently of the AD24xx, you just need to tie of the pins correctly AND provide a Vbus that meets the chip spec for CFG0 or CFG4.

> With 9 V on the bus, should both BP and BN measure ~9 V to ground, or only one of them?
Only Bp, Bn is ground (well when I see 9V I think CFG 0, ADI's AD2437RJ45 based  boards flip the positive and negative differential signals but NOT the power). Hopefully I can put a link here that will help you: https://audioxpress.com/article/r-d-stories-getting-started-with-automotive-audio-bus-part1

Thanks Brewster — that answers the 9 V question.

To clarify the SWBYP = 1 case: discovery completes and the AD2428 is fully readable (its internal DSP even gets programmed over the bus), but the amplifier never wakes up. Our current understanding is that the amplifier uses bus bias as its wake-up signal and expects roughly 5–9 V (AD2428 / CFG0 range).

What we see with the AD2428 EVK as main: the amplifier blinks (standby) while bias is present, then goes solid right after discovery succeeds and audio plays. Measured on the bus: one wire ≈ 6 V, the other ≈ 0 V.

Our AD2437 main circuit is attached. V_BATT = 12–24 V feeds both the AD2437 VBUS pin and the bus switch: a high-side NMOS (DMN3028L) on SWP, 0.05 Ω sense into ISENSEP, VSENSEP after the switch; no low-side switch (SWN / VSENSEN / ISENSEN tied to ground through 100 k); transformer-coupled data with 120 Ω terminations; VIN = 5 V, LVI = 0. One thing that looks different from the EVK: on our board both BP and BN carry the bias voltage (both inductors L140/L141 hang off the same switched node), whereas on the EVK only one wire is at ~6 V and the other is at 0 V.

We also tried forcing V_BATT to 9 V externally. The amplifier does detect it and starts blinking (standby), but it never goes solid — discovery on the AD2437 still fails.

And on the UTP setting: our main uses the Custom Platform block in SS+, and the Cable Type / UTP option does not appear anywhere in the UI for it (only Local Powered and Expected HPSW_CFG, which is read-only).

Given all this, what would you recommend? Is the both-wires-biased front end the problem for a CFG0 node (i.e. should bias be on BP only with BN as return), and is the right path an external CFG0-compliant 9 V with SWBYP = 1?

Thanks again.

Hi Nono,

I gave you some bad information; the port type in SS+ is set on the A port of the downstream node (yeah to me this is backwards). With the subnode being the AD2428 you don't get the drop-down choices like you would with the AD2437 as a sub-node. Sorry for the confusion there.  It also means I don't actually know (remember) what the main node is doing with GPIO7.  I think for now we can ignore that.

You have what I would call two issues in your design:

1) You're applying Vbat (>12V) to a CFG0 device (AD2428). Now in your system that's only partially true because the AD2428 is locally powered.  But it has the A2B power sense circuit and that's probably not expecting more than 9V.  And if you plugged in some bus powered AD242x (or AD2433) device you are stressing it - maybe even let out some smoke.

2) On the B port in UTP (or 2 wire) systems BP is the positive bus power and BN is supply return - nominally ground but if it's a bus powered node than it's not actual ground.  There's also a question of fault detection on the BN side; you're not doing that which is fine but in AD2428 it's baked into the chip and you're kind of assuming the things you (will) plug in aren't counting on the return path sensing.

To show that it works connect R270 to 9V, not Vbat.  Disconnect L141 from Q4 and connect to ground.  That will turn on the amp and using 9V not risk part damage.

Good luck,

Brewster

Dang, I forgot about the IsenseP connection.  It won't like 9V being there. I left my original comment alone just to show how easy it is to forget something on this stuff.

I think there's no simple way to try and trick the AD2437 to act like a CFG0 A2B power source. Tie off the IsenseP/VsenseP and connect a 9V 300 mA max power source to the BP line through L140.

Thanks Brewster — just to make sure we read you correctly:

We keep the bus CFG0 for the amplifier (BP = 9 V, BN = return), but the 9 V comes from a separate regulator (from Vbat, 300 mA limit) straight into L140 → BP, not through the AD2437's switch. L141 goes to ground. The AD2437 runs with SWBYP = 1 so Q4 never switches, and its VBUS / ISENSEP stay on Vbat; VSENSEP gets a 100 k to ground so it isn't floating, SWN / VSENSEN / ISENSEN stay 100 k to ground.

Is that what you had in mind?

VSENSEP goes 100K to Vbat, not ground. For now though you could just remove Q4.

I think the rest should work. Still a chance I forgot some oddity but it should be minor.. You could ignore SWBYP if Q4 is pulled.

Hi Brewster,

Thank you very much for the follow-up and for the correction on VSENSEP — really appreciated.

We have implemented your suggestion: Q4 is removed and L141 goes to ground, so the AD2437 no longer switches anything and the bias is fed straight into L140. For the moment the whole A2B power section (VBUS/ISENSEP and the L140 feed) is on the same bench rail.

What we observe:
- Rail at 8 V: discovery fails with INTTYPE 0x2A.
- Rail at 7.5 V: discovery completes.

However, the amplifier still does not switch into A2B mode (the front LED keeps blinking). The amplifier vendor tells us it should start on its own once discovery completes — which is exactly what we see with the AD2428 EVK as main, using the same amplifier and the same cable, without any mailbox traffic — and that its MCU checks A2B_NODE bit 5 (DISCVD) on its own AD2428. We have verified that this bit is set on our bus, and every register the main writes into the amplifier's AD2428 is byte-identical between the EVK case and ours.

So the AD2437 links to the amplifier's AD2428 without any errors, yet the amplifier does not seem to accept it. If you don't mind, two more questions:

1. Is the 0x2A at 8 V expected with VBUS below spec, or could it point at something else in our tie-off?
2. Is there anything an AD2437 main puts on the bus (SCF contents, timing, or anything the sub's MCU could read back) that differs from an AD2428 main and that a sub-side controller might be checking?

Thanks again for your time and patience with this.

Hi Brewster,

A quick update: the amplifier now starts up with our AD2437 main. The cause turned out to be timing rather than registers.

The amplifier is bus-powered and wakes up on bus voltage. If bus voltage is applied first and discovery comes later, the amp boots, sees no main, goes into its "searching" (blinking) state and does not accept a later discovery. If the bus power is switched on at the same moment discovery starts, the amp is discovered within its boot window and the LED goes solid.

This matches the AD2428 EVK behaviour: with the amp connected and the EVK idle, the amp LED is off; when SWCTL.ENSW closes the switch and discovery runs, the amp starts blinking and then goes solid once it is up. So feeding a constant bias into the bus, as we did before, does not fit the amplifier's design — the bus power has to come up together with the discovery sequence, the way the EVK does it through SWP.

We are now working out how to get that power-on / discovery timing on our board.

Thanks again for your help on this.
Nono

Hi Nono,

Discovery and bus power really shouldn't have a timing sensitivity. It is true that the normally discovery starts 'soon' after bus power but there's no requirement to do so and sub-node should not make assumptions.  Then there's the reality of what is actually out there.  Glad you figured it out.

BTW you didn't mention it but assuming you don't have schematics of the amp one of the things I should have suggested was take the amp apart and trace out it's A2B front end.  I assume they put an opto-isolater circuit in to detect bus power and wake up their amp, but it would be helpful to know exactly what they did.

For CFG0 bus power down to 4V should work and your test maybe raised a question.

I didn't think this through but I'm going to guess that you could leave the senseP signals tied off to Vbat (12V) but still use SWP to switch 9V onto the B_P line (through the inductor, etc).  If whatever regulator you use to generate the 9V has a fault output that could connect to AD2437's GPIO so that your software can detect a short, etc.  You would add code to the driver to support that, but as I mentioned before the ADI code already has it in there for GPIO7.

For completeness will also mention that if this is a vehicle application and your "12V" isn't conditioned elsewhere you need all the usual precautions against under/overvoltage events.

This was an interesting one.  Good luck with the rest of the project!

Brewster

Hi Nono,

Discovery and bus power really shouldn't have a timing sensitivity. It is true that the normally discovery starts 'soon' after bus power but there's no requirement to do so and sub-node should not make assumptions.  Then there's the reality of what is actually out there.  Glad you figured it out.

BTW you didn't mention it but assuming you don't have schematics of the amp one of the things I should have suggested was take the amp apart and trace out it's A2B front end.  I assume they put an opto-isolater circuit in to detect bus power and wake up their amp, but it would be helpful to know exactly what they did.

For CFG0 bus power down to 4V should work and your test maybe raised a question.

I didn't think this through but I'm going to guess that you could leave the senseP signals tied off to Vbat (12V) but still use SWP to switch 9V onto the B_P line (through the inductor, etc).  If whatever regulator you use to generate the 9V has a fault output that could connect to AD2437's GPIO so that your software can detect a short, etc.  You would add code to the driver to support that, but as I mentioned before the ADI code already has it in there for GPIO7.

For completeness will also mention that if this is a vehicle application and your "12V" isn't conditioned elsewhere you need all the usual precautions against under/overvoltage events.

This was an interesting one.  Good luck with the rest of the project!

Brewster