There was an anomaly reported by ADI which is listed below:
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2. 18000028 - BMMCFG.BMMRXEN Bit Does Not Behave as Expected:
DESCRIPTION: In bus monitor mode, the A2B_BMMCFG.BMMRXEN bit allows software to control enable of A-side LVDS receiver and when the bus monitor node locks to the bus. This bit is used to keep the A-side LVDS receiver static while bus monitor node is being attached, and it is also used to re-initiate the bus monitor lock sequence without physically detaching the bus monitor node. The A-side LVDS receiver is expected to be disabled when BMMRXEN = 0. However, due to this anomaly, the BMMRXEN bit is not functional when PLL is not locked and the A-side LVDS receiver can only be disabled/re-enabled after PLL is locked i.e. when PLL is not locked, the BMMRXEN bit is ignored and the A-side LVDS receiver is always enabled. Therefore, if bus monitor node is enabled (BMMEN = 1) with BMMREXN = 0, then it may cause the transceiver to lock and unlock from the bus. WORKAROUND: The BMMEN and BMMRXEN bits must be set in a single write when entering bus monitor mode operation. Software control of bus monitor lock time must be implemented external to the transceiver. For example, use an external switch to control the LVDS traffic going to the A-side of a transceiver in bus monitor mode.
Refer app note AN-1391 for details. APPLIES TO REVISION
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I am building a device that will need to work in A2B monitoring mode. This anomaly report references AN-1391 but I am unable to locate this document. I am looking for a reference design or similar for board build.