Makes no sense and I would guess pilot error, but it's 100% repeatable.
Loading a project with 3 nodes causes the 2nd node to have no SYNC and BCLK out even though the bits are set to enable I2S.
Running a 2 node example the 2nd node will work fine *unless* the 3 node example has been run, in which case the only way to get working I2S is power cycle the 2nd node. All of the files referred to can be found in the .zip.
The hardware used has AD2437 and ADAU1761 for ADC/DAC for nodes 1 and 2, and generic DAC at node 3, all nodes locally powered.
It's tough to imagine how this is a hardware related problem. I'm hoping by posting here someone may come up with a diagnostic that points to the cause of the failure.
Here are the steps that if you did have hardware with AD2437/ADA1761 will demonstrate the failure:
1) Run EVM_EVM.ssprj
2nd node (Sub0) will play audio input to the main node. AD2437 I2S all normal.
2) Run EVM_EVM_BB_48K_Kills-it.ssprj
This project was created by adding a 3rd node to the prior example.
Run it, and no audio passes from 1st to 2nd node, and there are no SYNC, BCLK, or I2S data signals output by the 2nd node. The 3rd node does show SYNC and BLCK, but no data.
3) Run EVM_EVM.ssprj again
No audio passes from 1st to 2nd node, and there are no SYNC, BCLK, or I2S data signals output by the 2nd node.
4) Power cycle 2nd node and Run EVM_EVM.ssprj again
Works as expected.
Power cycling the 1st node (main) does NOT clear the fault.
The 3rd node is plugged in during all of these tests.