Issue Discovery of Subordinate Node 0 AD2427 while accessing from master AD2428

kiran_1490

on Feb 21, 2022

Hi all,

On a custom platform I am trying to test A2B audio. The AD2428 which on the PCB acts as master and i

have connected a mike with AD2427(Subordinate Node). In linux terminal of the SOC I can read the default registers

of master AD2428

#i2cget -f -y 2 0x68 0x2

#0xad

#i2cget -f -y 2 0x68 0x3

#0x28

and i can configure the master AD2428 using i2cset commands

I have used simple discovery in the trm i am configuring the AD2428 master using the following command

i2cset -f -y 2 0x68 0x12 0x84
i2cset -f -y 2 0x68 0x1B 0x77
i2cset -f -y 2 0x68 0x1C 0x7E
i2cset -f -y 2 0x68 0x1D 0x0F
i2cset -f -y 2 0x68 0x0F 0x7F
i2cset -f -y 2 0x68 0x12 0x01
i2cset -f -y 2 0x68 0x41 0x42
i2cset -f -y 2 0x68 0x09 0x01
i2cset -f -y 2 0x68 0x13 0x7F
i2cset -f -y 2 0x68 0x1A 0x01
i2cset -f -y 2 0x68 0x01 0x00

After these configurations when i read the Interrupt Type Register (Master Only) 0x17

It is not going to DSCDONE - Discovery done interrupt (master only) it is still in the 0xff(mater locked state.)

#i2cget -f -y 2 0x68 0x17

#oxff

after this if tried to read the default register of the AD2427(slave 0)

I am getting the No ACK from the AD2427.

#i2cget -f -y 2 0x69 0x02

#No Ack from the address 0xD2

can you please suggest any changes in the configurations so that I can discover the Subordinate Node and configure the Subordinate Node..?

Thanks in advance

Top Replies

+1 Nandini

on Feb 25, 2022 1:32 PM
Hi Kiran ,

You followed the correct Discovery Sequence. We tried the same sequence on Bench and were able to discover the Sub-ordinate Node.

However , there could be some issues with the Sub-ordinate Node or Cable that you're using, or Power related Issues causing Fault undetected by Hardware Diagnostics. We suggest you to make sure that the Cable/Sub-Node isn't Defective.

Thanks,
Nandini.
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+1 Swaroop.bagur

on Mar 9, 2022 5:35 PM in reply to Nandini
Hi Kiran,

Please let us know if you are able to resolve the issue.

In case not, could you please try giving some delay of ~35ms after sending the command to A2B_DISCVRY register: 'i2cset -f -y 2 0x68 0x13 0x7F'

Best Regards, Swaroop.
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0 kiran_1490
on Jun 15, 2022 11:39 AM in reply to Nandini
Thanks for the reply we were able to solve the issue. As suggested by you it is indeed the hardware issue.
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0 kiran_1490
on Jun 15, 2022 11:53 AM in reply to Swaroop.bagur
Hi swaroop and nandini,

Now we are able to record audio on our platform but as of now we were able to record from only one mic (we have four mics in our setup.) we were able to record from first mic through last mic(one mic at a time with different configuration scripts)

Now we are facing issue with all the mics at a time, master is configured in tdm8 mode the .wav file is always 0. we want to record audio from four mics as 8 channels.

we have configured every node should contribute local one slot of upstream data along with the coming slots from the previous slaves.

Thanks,

Kiran
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0 Swaroop.bagur

on Jun 15, 2022 2:58 PM in reply to kiran_1490
Hi Kiran,

For our understanding, are you using the 4 sub-nodes with one mic in each or one

Sub-node 4 mics?

Please help me with this by attaching the configuration and script.
to test in our bench.

Thanks.
Swaroop B U.
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0 kiran_1490

on Jun 15, 2022 3:17 PM in reply to Swaroop.bagur

Hi Swaroop,

We are using 4 sub-nodes with one mic in each and they are working fine with any one mic contributing the upstream data but it is failing when all the mics are contributing the upstream data.

The configuration image is

The configuration script is

i2cset -f -y 2 0x68 0x12 0x84  /* CONTROL */
sleep 0.5
i2cset -f -y 2 0x68 0x1B 0x10  /* INTMSK0 */
i2cset -f -y 2 0x68 0x1C 0x00  /* INTMSK1 */
i2cset -f -y 2 0x68 0x1D 0x09  /* INTMSK2 */
i2cset -f -y 2 0x68 0x0F 0x7A  /* RESPCYCS */
i2cset -f -y 2 0x68 0x12 0x01  /* CONTROL */
i2cset -f -y 2 0x68 0x41 0x02  /* I2SGCFG */
i2cset -f -y 2 0x68 0x09 0x01  /* SWCTL */
i2cset -f -y 2 0x68 0x13 0x7A  /* DISCVRY */
sleep 0.5
i2cset -f -y 2 0x68 0x1A 0x01  /* INTPND2 */
i2cset -f -y 2 0x68 0x01 0x00  /* NODEADR */
i2cset -f -y 2 0x68 0x09 0x21  /* SWCTL */
i2cset -f -y 2 0x68 0x01 0x00  /* NODEADR */
i2cset -f -y 2 0x69 0x12 0x00  /* CONTROL */
i2cset -f -y 2 0x69 0x09 0x01  /* SWCTL */
i2cset -f -y 2 0x68 0x13 0x76  /* DISCVRY */
sleep 0.5
i2cset -f -y 2 0x68 0x1A 0x01  /* INTPND2 */
i2cset -f -y 2 0x68 0x01 0x01  /* NODEADR */
i2cset -f -y 2 0x68 0x01 0x00  /* NODEADR */
i2cset -f -y 2 0x69 0x09 0x21  /* SWCTL */
i2cset -f -y 2 0x68 0x01 0x01  /* NODEADR */
i2cset -f -y 2 0x69 0x12 0x00  /* CONTROL */
i2cset -f -y 2 0x69 0x09 0x01  /* SWCTL */
i2cset -f -y 2 0x68 0x13 0x72  /* DISCVRY */
sleep 0.5
i2cset -f -y 2 0x68 0x1A 0x01  /* INTPND2 */
i2cset -f -y 2 0x68 0x01 0x02  /* NODEADR */
i2cset -f -y 2 0x68 0x01 0x01  /* NODEADR */
i2cset -f -y 2 0x69 0x09 0x21  /* SWCTL */
i2cset -f -y 2 0x68 0x01 0x02  /* NODEADR */
i2cset -f -y 2 0x69 0x12 0x00  /* CONTROL */
i2cset -f -y 2 0x69 0x09 0x01  /* SWCTL */
i2cset -f -y 2 0x68 0x13 0x6E  /* DISCVRY */
sleep 0.5
i2cset -f -y 2 0x68 0x1A 0x01  /* INTPND2 */
i2cset -f -y 2 0x68 0x01 0x03  /* NODEADR */
i2cset -f -y 2 0x68 0x01 0x02  /* NODEADR */
i2cset -f -y 2 0x69 0x09 0x21  /* SWCTL */
i2cset -f -y 2 0x68 0x01 0x03  /* NODEADR */
i2cset -f -y 2 0x69 0x0A 0x00  /* BCDNSLOTS */
i2cset -f -y 2 0x69 0x0B 0x00  /* LDNSLOTS */
i2cset -f -y 2 0x69 0x0C 0x01  /* LUPSLOTS */
i2cset -f -y 2 0x69 0x3F 0x00  /* I2CCFG */
i2cset -f -y 2 0x69 0x47 0x01  /* PDMCTL */
i2cset -f -y 2 0x69 0x5D 0x00  /* PDMCTL2 */
i2cset -f -y 2 0x69 0x48 0x00  /* ERRMGMT */
i2cset -f -y 2 0x69 0x4A 0x00  /* GPIODAT */
i2cset -f -y 2 0x69 0x4D 0x00  /* GPIOOEN */
i2cset -f -y 2 0x69 0x4E 0x00  /* GPIOIEN */
i2cset -f -y 2 0x69 0x50 0x00  /* PINTEN */
i2cset -f -y 2 0x69 0x51 0x00  /* PINTINV */
i2cset -f -y 2 0x69 0x52 0x01  /* PINCFG */
i2cset -f -y 2 0x69 0x20 0x00  /* TESTMODE */
i2cset -f -y 2 0x69 0x59 0x00  /* CLK1CFG */
i2cset -f -y 2 0x69 0x5A 0x81  /* CLK2CFG */
i2cset -f -y 2 0x69 0x60 0x00  /* UPMASK0 */
i2cset -f -y 2 0x69 0x61 0x00  /* UPMASK1 */
i2cset -f -y 2 0x69 0x62 0x00  /* UPMASK2 */
i2cset -f -y 2 0x69 0x63 0x00  /* UPMASK3 */
i2cset -f -y 2 0x69 0x64 0x00  /* UPOFFSET */
i2cset -f -y 2 0x69 0x65 0x00  /* DNMASK0 */
i2cset -f -y 2 0x69 0x66 0x00  /* DNMASK1 */
i2cset -f -y 2 0x69 0x67 0x00  /* DNMASK2 */
i2cset -f -y 2 0x69 0x68 0x00  /* DNMASK3 */
i2cset -f -y 2 0x69 0x69 0x00  /* DNOFFSET */
i2cset -f -y 2 0x69 0x81 0x00  /* GPIOD0MSK */
i2cset -f -y 2 0x69 0x82 0x00  /* GPIOD1MSK */
i2cset -f -y 2 0x69 0x83 0x00  /* GPIOD2MSK */
i2cset -f -y 2 0x69 0x84 0x00  /* GPIOD3MSK */
i2cset -f -y 2 0x69 0x85 0x00  /* GPIOD4MSK */
i2cset -f -y 2 0x69 0x86 0x00  /* GPIOD5MSK */
i2cset -f -y 2 0x69 0x87 0x00  /* GPIOD6MSK */
i2cset -f -y 2 0x69 0x88 0x00  /* GPIOD7MSK */
i2cset -f -y 2 0x69 0x8A 0x00  /* GPIODINV */
i2cset -f -y 2 0x69 0x80 0x00  /* GPIODEN */
i2cset -f -y 2 0x69 0x90 0x00  /* MBOX0CTL */
i2cset -f -y 2 0x69 0x96 0x00  /* MBOX1CTL */
i2cset -f -y 2 0x69 0x5C 0x00  /* SUSCFG */
i2cset -f -y 2 0x69 0x58 0x00  /* I2SRRSOFFS */
i2cset -f -y 2 0x69 0x57 0x00  /* I2SRRCTL */
i2cset -f -y 2 0x69 0x2E 0x00  /* TXACTL */
i2cset -f -y 2 0x69 0x30 0x00  /* TXBCTL */
i2cset -f -y 2 0x69 0x1B 0x10  /* INTMSK0 */
i2cset -f -y 2 0x69 0x1C 0x00  /* INTMSK1 */
i2cset -f -y 2 0x69 0x1E 0x00  /* BECCTL */
i2cset -f -y 2 0x68 0x01 0x02  /* NODEADR */
i2cset -f -y 2 0x69 0x0A 0x00  /* BCDNSLOTS */
i2cset -f -y 2 0x69 0x0B 0x00  /* LDNSLOTS */
i2cset -f -y 2 0x69 0x0C 0x01  /* LUPSLOTS */
i2cset -f -y 2 0x69 0x3F 0x00  /* I2CCFG */
i2cset -f -y 2 0x69 0x47 0x01  /* PDMCTL */
i2cset -f -y 2 0x69 0x5D 0x00  /* PDMCTL2 */
i2cset -f -y 2 0x69 0x48 0x00  /* ERRMGMT */
i2cset -f -y 2 0x69 0x4A 0x00  /* GPIODAT */
i2cset -f -y 2 0x69 0x4D 0x00  /* GPIOOEN */
i2cset -f -y 2 0x69 0x4E 0x00  /* GPIOIEN */
i2cset -f -y 2 0x69 0x50 0x00  /* PINTEN */
i2cset -f -y 2 0x69 0x51 0x00  /* PINTINV */
i2cset -f -y 2 0x69 0x52 0x01  /* PINCFG */
i2cset -f -y 2 0x69 0x20 0x00  /* TESTMODE */
i2cset -f -y 2 0x69 0x59 0x00  /* CLK1CFG */
i2cset -f -y 2 0x69 0x5A 0x81  /* CLK2CFG */
i2cset -f -y 2 0x69 0x60 0x00  /* UPMASK0 */
i2cset -f -y 2 0x69 0x61 0x00  /* UPMASK1 */
i2cset -f -y 2 0x69 0x62 0x00  /* UPMASK2 */
i2cset -f -y 2 0x69 0x63 0x00  /* UPMASK3 */
i2cset -f -y 2 0x69 0x64 0x00  /* UPOFFSET */
i2cset -f -y 2 0x69 0x65 0x00  /* DNMASK0 */
i2cset -f -y 2 0x69 0x66 0x00  /* DNMASK1 */
i2cset -f -y 2 0x69 0x67 0x00  /* DNMASK2 */
i2cset -f -y 2 0x69 0x68 0x00  /* DNMASK3 */
i2cset -f -y 2 0x69 0x69 0x00  /* DNOFFSET */
i2cset -f -y 2 0x69 0x81 0x00  /* GPIOD0MSK */
i2cset -f -y 2 0x69 0x82 0x00  /* GPIOD1MSK */
i2cset -f -y 2 0x69 0x83 0x00  /* GPIOD2MSK */
i2cset -f -y 2 0x69 0x84 0x00  /* GPIOD3MSK */
i2cset -f -y 2 0x69 0x85 0x00  /* GPIOD4MSK */
i2cset -f -y 2 0x69 0x86 0x00  /* GPIOD5MSK */
i2cset -f -y 2 0x69 0x87 0x00  /* GPIOD6MSK */
i2cset -f -y 2 0x69 0x88 0x00  /* GPIOD7MSK */
i2cset -f -y 2 0x69 0x8A 0x00  /* GPIODINV */
i2cset -f -y 2 0x69 0x80 0x00  /* GPIODEN */
i2cset -f -y 2 0x69 0x90 0x00  /* MBOX0CTL */
i2cset -f -y 2 0x69 0x96 0x00  /* MBOX1CTL */
i2cset -f -y 2 0x69 0x5C 0x00  /* SUSCFG */
i2cset -f -y 2 0x69 0x58 0x00  /* I2SRRSOFFS */
i2cset -f -y 2 0x69 0x57 0x00  /* I2SRRCTL */
i2cset -f -y 2 0x69 0x2E 0x00  /* TXACTL */
i2cset -f -y 2 0x69 0x30 0x00  /* TXBCTL */
i2cset -f -y 2 0x69 0x1B 0x10  /* INTMSK0 */
i2cset -f -y 2 0x69 0x1C 0x00  /* INTMSK1 */
i2cset -f -y 2 0x69 0x1E 0x00  /* BECCTL */
i2cset -f -y 2 0x68 0x01 0x01  /* NODEADR */
i2cset -f -y 2 0x69 0x0A 0x00  /* BCDNSLOTS */
i2cset -f -y 2 0x69 0x0B 0x00  /* LDNSLOTS */
i2cset -f -y 2 0x69 0x0C 0x01  /* LUPSLOTS */
i2cset -f -y 2 0x69 0x3F 0x00  /* I2CCFG */
i2cset -f -y 2 0x69 0x47 0x01  /* PDMCTL */
i2cset -f -y 2 0x69 0x5D 0x00  /* PDMCTL2 */
i2cset -f -y 2 0x69 0x48 0x00  /* ERRMGMT */
i2cset -f -y 2 0x69 0x4A 0x00  /* GPIODAT */
i2cset -f -y 2 0x69 0x4D 0x00  /* GPIOOEN */
i2cset -f -y 2 0x69 0x4E 0x00  /* GPIOIEN */
i2cset -f -y 2 0x69 0x50 0x00  /* PINTEN */
i2cset -f -y 2 0x69 0x51 0x00  /* PINTINV */
i2cset -f -y 2 0x69 0x52 0x01  /* PINCFG */
i2cset -f -y 2 0x69 0x20 0x00  /* TESTMODE */
i2cset -f -y 2 0x69 0x59 0x00  /* CLK1CFG */
i2cset -f -y 2 0x69 0x5A 0x81  /* CLK2CFG */
i2cset -f -y 2 0x69 0x60 0x00  /* UPMASK0 */
i2cset -f -y 2 0x69 0x61 0x00  /* UPMASK1 */
i2cset -f -y 2 0x69 0x62 0x00  /* UPMASK2 */
i2cset -f -y 2 0x69 0x63 0x00  /* UPMASK3 */
i2cset -f -y 2 0x69 0x64 0x00  /* UPOFFSET */
i2cset -f -y 2 0x69 0x65 0x00  /* DNMASK0 */
i2cset -f -y 2 0x69 0x66 0x00  /* DNMASK1 */
i2cset -f -y 2 0x69 0x67 0x00  /* DNMASK2 */
i2cset -f -y 2 0x69 0x68 0x00  /* DNMASK3 */
i2cset -f -y 2 0x69 0x69 0x00  /* DNOFFSET */
i2cset -f -y 2 0x69 0x81 0x00  /* GPIOD0MSK */
i2cset -f -y 2 0x69 0x82 0x00  /* GPIOD1MSK */
i2cset -f -y 2 0x69 0x83 0x00  /* GPIOD2MSK */
i2cset -f -y 2 0x69 0x84 0x00  /* GPIOD3MSK */
i2cset -f -y 2 0x69 0x85 0x00  /* GPIOD4MSK */
i2cset -f -y 2 0x69 0x86 0x00  /* GPIOD5MSK */
i2cset -f -y 2 0x69 0x87 0x00  /* GPIOD6MSK */
i2cset -f -y 2 0x69 0x88 0x00  /* GPIOD7MSK */
i2cset -f -y 2 0x69 0x8A 0x00  /* GPIODINV */
i2cset -f -y 2 0x69 0x80 0x00  /* GPIODEN */
i2cset -f -y 2 0x69 0x90 0x00  /* MBOX0CTL */
i2cset -f -y 2 0x69 0x96 0x00  /* MBOX1CTL */
i2cset -f -y 2 0x69 0x5C 0x00  /* SUSCFG */
i2cset -f -y 2 0x69 0x58 0x00  /* I2SRRSOFFS */
i2cset -f -y 2 0x69 0x57 0x00  /* I2SRRCTL */
i2cset -f -y 2 0x69 0x2E 0x00  /* TXACTL */
i2cset -f -y 2 0x69 0x30 0x00  /* TXBCTL */
i2cset -f -y 2 0x69 0x1B 0x10  /* INTMSK0 */
i2cset -f -y 2 0x69 0x1C 0x00  /* INTMSK1 */
i2cset -f -y 2 0x69 0x1E 0x00  /* BECCTL */
i2cset -f -y 2 0x68 0x01 0x00  /* NODEADR */
i2cset -f -y 2 0x69 0x0A 0x00  /* BCDNSLOTS */
i2cset -f -y 2 0x69 0x0B 0x00  /* LDNSLOTS */
i2cset -f -y 2 0x69 0x0C 0x01  /* LUPSLOTS */
i2cset -f -y 2 0x69 0x3F 0x00  /* I2CCFG */
i2cset -f -y 2 0x69 0x47 0x01  /* PDMCTL */
i2cset -f -y 2 0x69 0x5D 0x00  /* PDMCTL2 */
i2cset -f -y 2 0x69 0x48 0x00  /* ERRMGMT */
i2cset -f -y 2 0x69 0x4A 0x00  /* GPIODAT */
i2cset -f -y 2 0x69 0x4D 0x00  /* GPIOOEN */
i2cset -f -y 2 0x69 0x4E 0x00  /* GPIOIEN */
i2cset -f -y 2 0x69 0x50 0x00  /* PINTEN */
i2cset -f -y 2 0x69 0x51 0x00  /* PINTINV */
i2cset -f -y 2 0x69 0x52 0x01  /* PINCFG */
i2cset -f -y 2 0x69 0x20 0x00  /* TESTMODE */
i2cset -f -y 2 0x69 0x59 0x00  /* CLK1CFG */
i2cset -f -y 2 0x69 0x5A 0x81  /* CLK2CFG */
i2cset -f -y 2 0x69 0x60 0x00  /* UPMASK0 */
i2cset -f -y 2 0x69 0x61 0x00  /* UPMASK1 */
i2cset -f -y 2 0x69 0x62 0x00  /* UPMASK2 */
i2cset -f -y 2 0x69 0x63 0x00  /* UPMASK3 */
i2cset -f -y 2 0x69 0x64 0x00  /* UPOFFSET */
i2cset -f -y 2 0x69 0x65 0x00  /* DNMASK0 */
i2cset -f -y 2 0x69 0x66 0x00  /* DNMASK1 */
i2cset -f -y 2 0x69 0x67 0x00  /* DNMASK2 */
i2cset -f -y 2 0x69 0x68 0x00  /* DNMASK3 */
i2cset -f -y 2 0x69 0x69 0x00  /* DNOFFSET */
i2cset -f -y 2 0x69 0x81 0x00  /* GPIOD0MSK */
i2cset -f -y 2 0x69 0x82 0x00  /* GPIOD1MSK */
i2cset -f -y 2 0x69 0x83 0x00  /* GPIOD2MSK */
i2cset -f -y 2 0x69 0x84 0x00  /* GPIOD3MSK */
i2cset -f -y 2 0x69 0x85 0x00  /* GPIOD4MSK */
i2cset -f -y 2 0x69 0x86 0x00  /* GPIOD5MSK */
i2cset -f -y 2 0x69 0x87 0x00  /* GPIOD6MSK */
i2cset -f -y 2 0x69 0x88 0x00  /* GPIOD7MSK */
i2cset -f -y 2 0x69 0x8A 0x00  /* GPIODINV */
i2cset -f -y 2 0x69 0x80 0x00  /* GPIODEN */
i2cset -f -y 2 0x69 0x90 0x00  /* MBOX0CTL */
i2cset -f -y 2 0x69 0x96 0x00  /* MBOX1CTL */
i2cset -f -y 2 0x69 0x5C 0x00  /* SUSCFG */
i2cset -f -y 2 0x69 0x58 0x00  /* I2SRRSOFFS */
i2cset -f -y 2 0x69 0x57 0x00  /* I2SRRCTL */
i2cset -f -y 2 0x69 0x2E 0x00  /* TXACTL */
i2cset -f -y 2 0x69 0x30 0x00  /* TXBCTL */
i2cset -f -y 2 0x69 0x1B 0x10  /* INTMSK0 */
i2cset -f -y 2 0x69 0x1C 0x00  /* INTMSK1 */
i2cset -f -y 2 0x69 0x1E 0x00  /* BECCTL */
i2cset -f -y 2 0x68 0x3F 0x00  /* I2CCFG */
i2cset -f -y 2 0x68 0x42 0x00  /* I2SCFG */
i2cset -f -y 2 0x68 0x44 0x00  /* I2STXOFFSET */
i2cset -f -y 2 0x68 0x45 0x00  /* I2SRXOFFSET */
i2cset -f -y 2 0x68 0x47 0x00  /* PDMCTL */
i2cset -f -y 2 0x68 0x5D 0x00  /* PDMCTL2 */
i2cset -f -y 2 0x68 0x48 0x00  /* ERRMGMT */
i2cset -f -y 2 0x68 0x4A 0x00  /* GPIODAT */
i2cset -f -y 2 0x68 0x4D 0x00  /* GPIOOEN */
i2cset -f -y 2 0x68 0x4E 0x00  /* GPIOIEN */
i2cset -f -y 2 0x68 0x50 0x00  /* PINTEN */
i2cset -f -y 2 0x68 0x51 0x00  /* PINTINV */
i2cset -f -y 2 0x68 0x52 0x01  /* PINCFG */
i2cset -f -y 2 0x68 0x20 0x00  /* TESTMODE */
i2cset -f -y 2 0x68 0x59 0x00  /* CLK1CFG */
i2cset -f -y 2 0x68 0x5A 0x00  /* CLK2CFG */
i2cset -f -y 2 0x68 0x81 0x00  /* GPIOD0MSK */
i2cset -f -y 2 0x68 0x82 0x00  /* GPIOD1MSK */
i2cset -f -y 2 0x68 0x83 0x00  /* GPIOD2MSK */
i2cset -f -y 2 0x68 0x84 0x00  /* GPIOD3MSK */
i2cset -f -y 2 0x68 0x85 0x00  /* GPIOD4MSK */
i2cset -f -y 2 0x68 0x86 0x00  /* GPIOD5MSK */
i2cset -f -y 2 0x68 0x87 0x00  /* GPIOD6MSK */
i2cset -f -y 2 0x68 0x88 0x00  /* GPIOD7MSK */
i2cset -f -y 2 0x68 0x8A 0x00  /* GPIODINV */
i2cset -f -y 2 0x68 0x80 0x00  /* GPIODEN */
i2cset -f -y 2 0x68 0x57 0x00  /* I2SRRCTL */
i2cset -f -y 2 0x68 0x2E 0x00  /* TXACTL */
i2cset -f -y 2 0x68 0x30 0x00  /* TXBCTL */
i2cset -f -y 2 0x68 0x1E 0x00  /* BECCTL */
i2cset -f -y 2 0x68 0x01 0x02  /* NODEADR */
i2cset -f -y 2 0x69 0x0D 0x00  /* DNSLOTS */
i2cset -f -y 2 0x69 0x0E 0x01  /* UPSLOTS */
i2cset -f -y 2 0x68 0x01 0x01  /* NODEADR */
i2cset -f -y 2 0x69 0x0D 0x00  /* DNSLOTS */
i2cset -f -y 2 0x69 0x0E 0x02  /* UPSLOTS */
i2cset -f -y 2 0x68 0x01 0x00  /* NODEADR */
i2cset -f -y 2 0x69 0x0D 0x00  /* DNSLOTS */
i2cset -f -y 2 0x69 0x0E 0x03  /* UPSLOTS */
i2cset -f -y 2 0x68 0x0D 0x00  /* DNSLOTS */
i2cset -f -y 2 0x68 0x0E 0x04  /* UPSLOTS */
i2cset -f -y 2 0x68 0x01 0x02  /* NODEADR */
i2cset -f -y 2 0x69 0x09 0x01  /* SWCTL */
i2cset -f -y 2 0x68 0x01 0x01  /* NODEADR */
i2cset -f -y 2 0x69 0x09 0x01  /* SWCTL */
i2cset -f -y 2 0x68 0x01 0x00  /* NODEADR */
i2cset -f -y 2 0x69 0x09 0x01  /* SWCTL */
i2cset -f -y 2 0x68 0x09 0x01  /* SWCTL */
i2cset -f -y 2 0x68 0x40 0x00  /* PLLCTL */
i2cset -f -y 2 0x68 0x01 0x80  /* NODEADR */
i2cset -f -y 2 0x69 0x40 0x00  /* PLLCTL */
i2cset -f -y 2 0x68 0x01 0x00  /* NODEADR */
i2cset -f -y 2 0x68 0x10 0x22  /* SLOTFMT */
i2cset -f -y 2 0x68 0x11 0x03  /* DATCTL */
i2cset -f -y 2 0x68 0x56 0x01  /* I2SRRATE */
i2cset -f -y 2 0x68 0x12 0x01  /* CONTROL */

0 kiran_1490
on Jun 20, 2022 12:05 PM in reply to kiran_1490
Hi Swaroop,

Did you get a chance to test the above script on your bench.

Thanks & Regards,

Kiran
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0 Swaroop.bagur

on Jun 20, 2022 12:38 PM in reply to kiran_1490
Hi Kiran,

We are working on that, ASAP we will update.

Thanks.

Swaroop.
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0 Swaroop.bagur

on Jun 21, 2022 5:31 PM in reply to Swaroop.bagur
HI Kiran;

We tested your file on the bench, it will work if we enable the tx pins on the Main node.
Please make sure enable the pins.

Please refer the attachment for your reference.

Thanks,
Swaroop B U
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0 kiran_1490
on Jun 25, 2022 11:44 AM in reply to Swaroop.bagur
Hi Swaroop,

I have tried with enabling TXpin(we are using one). But the four mics configuration is not working for me.

Interestingly, with above script by changing if i change the I2S mode to tdm2 instead of tdm8 in the above script by writing below transaction i can see the data on the I2S bus

i2cset -f -y 2 0x68 0x41 0x40 (tdm 0 mode) the data is being recorded for the only slave 4 mic not from all the slaves

The moment i change the mode to tdm4 or tdm8 the data is not coming out of master slave.

FYI The BCLK we supply from the host is 1.5MHz to the master transceiver.

My question is how can we make the data from all the slaves nodes (not just one slave mic ) come out of master transceiver.

Thanks & Regards,

Kiran
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