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2,942 Views 11 Replies Last post: Nov 30, 2009 10:16 AM by DivyaS RSS
MarcS. Contributor
MarcS.
32 posts since
Oct 5, 2009
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Nov 11, 2009 11:10 AM

Implementation of FIR accelerator

Hi,

 

I use the SHARC 21469 and I would like to use the IIR and FIR accelerator units for processing audio data.

I found an IIR Accelerator Talkthrough example in the forum posted by Mitesh Moonat which works fine.


I tried to modify it to use the FIR accelerator, but it does not work properly and I don't know why.

Perhaps anyone has a working code example or you can take look at my code which is attached to the posting.

 

 

Best Regards,

 

Marc

Attachments:
Tags: adsp-2146x, fir, accelerator
mkokaly Analog Employee
mkokaly
40 posts since
Apr 15, 2009
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1. Nov 12, 2009 3:30 AM in response to: MarcS.
Re: Implementation of FIR accelerator

Hi Marc,

 

There is a number of FIR examples now shipping with VisualDSP++ 5.0 Update 7: C:\Program Files\Analog Devices\VisualDSP 5.0 (Update 7)\214xx\Examples\ADSP-21469 EZ-Board

 

VisualDSP++ 5.0 Update 7 was released just last week.  The update file and release notes can be found here:

http://www.analog.com/en/embedded-processing-dsp/software-and-reference-designs/content/visualdsp_tools_upgrades/fca.html

 

 

 

Regards,

 

MKokaly

Tom00 Contributor
Tom00
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Jul 13, 2009
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2. Nov 16, 2009 5:00 AM in response to: mkokaly
Re: Implementation of FIR accelerator

 

Hello Marc and MKokaly!

 

I have more a comment than a solution.

 

I also tried to implement the FIR-Accelerator (and the FFT Accelerator) in talk through mode, but with little success. In all examples (also the new ones  except the Talkthrough_FIR_Accelerator example) and manuals it is not shown/explained how to use the Accelerator periodically with the same coefficients.

 

The solution for the IIR example to clear and set the DMA enable bit does not work for in the FIR and FFT case. A assume the problem is related to the DMA start and stop conditions (Processor Hardware Reference 2-37). In the FFT case it helps to (re)set the "chain pointer register address field" to wake up the Accelerator.

 

 

My big open question is, what I have to do to bring the Accelerator from the idle mode in the processing mode again. In the manuals is only written "waits for core intervention", but I found no explanation what kind of to core intervention. For example Figure 6-5 of the hardware reference manual shows the program flow and explains everything except the last core intervention.

 

 

Big thanks for any help.

 

 

-Thomas

 

flowGraphSmall.JPG

DivyaS Analog Employee
DivyaS
128 posts since
Feb 3, 2009
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3. Nov 17, 2009 11:34 AM in response to: Thomas B
Re: Implementation of FIR accelerator

Hi Marc,

 

I got a chance to look at your code I modified the Talkthru code you attached for FIR filtering. The problem with the code was the input buffer handling was not right. The input buffer handling should be different when compared to that of IIR. Data must be fed to the input buffer in a circular buffer fashion to be able to perform the FIR filtering on the input buffer using the accelerators.

 

Thomas,

 

If you are using CAI (channel auto iterate bit ) you do not need to have any core intervention. For single iteration mode you will need to reenable the FIR accelerator for processing the next set of data. Please refer to the attached code.

 

Hope this helps.

 

Thanks,

Divya

 

Message was edited by: DivyaS Removed the attachment as the wrong code was attached.

MarcS. Contributor
MarcS.
32 posts since
Oct 5, 2009
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4. Nov 17, 2009 10:55 AM in response to: DivyaS
Re: Implementation of FIR accelerator

Hi Divya,

 

thank you for helping me, but in the code you attached I can't find any modifications and it doesn't work properly.

Perhaps you have just attached the wrong code.

 

Regards,

 

Marc

DivyaS Analog Employee
DivyaS
128 posts since
Feb 3, 2009
Currently Being Moderated
5. Nov 17, 2009 11:33 AM in response to: MarcS.
Re: Implementation of FIR accelerator

Hi Marc,

 

oops! I attached the wrong code. Here is the right one.

 

Thanks,

Divya

Attachments:
MarcS. Contributor
MarcS.
32 posts since
Oct 5, 2009
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6. Nov 19, 2009 2:34 AM in response to: DivyaS
Re: Implementation of FIR accelerator

Hi Divya,

the FIR accelerator is working fine. Thanks a lot for your help!

I have one last question to the code: Which role plays the variable 'count' in your code?

 

And just one annotation to the code: You should modify the coefficient index register in the TCBs from 'coeffs+63' to 'coeffs+TAPS-1', so it is easier to to change the length of coefficients or the audio block size.

 

Best regards,

 

Marc

Tom00 Contributor
Tom00
24 posts since
Jul 13, 2009
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7. Nov 19, 2009 3:44 AM in response to: MarcS.
Re: Implementation of FIR accelerator

Hi Divya,

 

Thanks for the nice example code. It works fine.

With the DAM enable bit I was wrong. I had a bug in my code and therefore I was not running.

 

 

Big Thanks

Thomas

 

 

To Marc: Maybe the simplest solution is the save the filter coefficients in reverse order, then you can use the address coeffs and the modifier +1.

MarcS. Contributor
MarcS.
32 posts since
Oct 5, 2009
Currently Being Moderated
8. Nov 19, 2009 4:59 AM in response to: Thomas B
Re: Implementation of FIR accelerator

Hi Thomas,

at this point you should use the version which fits better to your framwork code. As long as you are processing symmetric FIR filters it makes no difference.

 

Important for me is that other users who want to work with the code regard this point.

 

Regards,

 

Marc

DivyaS Analog Employee
DivyaS
128 posts since
Feb 3, 2009
Currently Being Moderated
9. Nov 19, 2009 11:33 AM in response to: MarcS.
Re: Implementation of FIR accelerator

Hi Marc,

 

Regarding your question to the count variable, I just used it for debug purposes. I used the coeffs+63 since you had the coefficient buffer length of 64 and Yes for generalization you could use coeffs+TAPS-1.

 

Thanks,

Divya

MarcS. Contributor
MarcS.
32 posts since
Oct 5, 2009
Currently Being Moderated
10. Nov 27, 2009 2:55 AM in response to: DivyaS
Re: Implementation of FIR accelerator

Hi Divya,

 

I have a further question to your code modifications. Why are the pointers initialized to "input_left + TAPS - 1"?

 

Here is the code snippet I refer to:

float *input_leftptr = input_left + TAPS -1;
float *input_rightptr = input_right + TAPS -1;

 

 

Best regards,

 

Marc

DivyaS Analog Employee
DivyaS
128 posts since
Feb 3, 2009
Currently Being Moderated
11. Nov 30, 2009 10:16 AM in response to: MarcS.
Re: Implementation of FIR accelerator

Hi Marc,

 

The reason for the pointer to be initialized to input_left + TAPS - 1 is due to the fact that FIR accelerators accept data in a particular format. With the FIR TCB initializations as in the code you will need to start filling data at input_left+TAPS-1 since the input buffer needs to be initially filled with tap length -1 samples to zero as required by the accelerator. This is the reason data filling starts at input_left+TAPS-1.

 

Hope this clarifies.

 

Thanks,

Divya

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